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NVMe: use split lo_hi_{read,write}q
Some controllers may require ordered split transfers even on 64bit machines, e.g. Apple's NVMe controller as found in the MacBook8,1 and MacBookAir7,1 (256/512GB models). This patch enforces ordered split transfers on 64bit platforms, which works around that issue for all controllers. As pointed out by Christoph [1] there should be no performance impact due to that modification. [1] http://lists.infradead.org/pipermail/linux-nvme/2015-November/002965.html Signed-off-by: Stephan Guenther <guenther@tum.de> Signed-off-by: Maurice Leclaire <leclaire@in.tum.de> Reviewed-by: Christoph Hellwig <hch@lst.de> Updated by me to explicitly use lo_hi_read/writeq instead of playing define tricks. Signed-off-by: Jens Axboe <axboe@fb.com>
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1 changed files with 6 additions and 6 deletions
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@ -1725,7 +1725,7 @@ static int nvme_configure_admin_queue(struct nvme_dev *dev)
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{
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int result;
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u32 aqa;
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u64 cap = readq(&dev->bar->cap);
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u64 cap = lo_hi_readq(&dev->bar->cap);
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struct nvme_queue *nvmeq;
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unsigned page_shift = PAGE_SHIFT;
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unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
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@ -1774,8 +1774,8 @@ static int nvme_configure_admin_queue(struct nvme_dev *dev)
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dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
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writel(aqa, &dev->bar->aqa);
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writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
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writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
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lo_hi_writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
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lo_hi_writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
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result = nvme_enable_ctrl(dev, cap);
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if (result)
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@ -2606,7 +2606,7 @@ static int nvme_dev_add(struct nvme_dev *dev)
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struct pci_dev *pdev = to_pci_dev(dev->dev);
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int res;
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struct nvme_id_ctrl *ctrl;
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int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
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int shift = NVME_CAP_MPSMIN(lo_hi_readq(&dev->bar->cap)) + 12;
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res = nvme_identify_ctrl(dev, &ctrl);
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if (res) {
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@ -2697,7 +2697,7 @@ static int nvme_dev_map(struct nvme_dev *dev)
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goto unmap;
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}
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cap = readq(&dev->bar->cap);
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cap = lo_hi_readq(&dev->bar->cap);
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dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
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dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
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dev->dbs = ((void __iomem *)dev->bar) + 4096;
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@ -2760,7 +2760,7 @@ static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
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* queues than admin tags.
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*/
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set_current_state(TASK_RUNNING);
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nvme_disable_ctrl(dev, readq(&dev->bar->cap));
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nvme_disable_ctrl(dev, lo_hi_readq(&dev->bar->cap));
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nvme_clear_queue(dev->queues[0]);
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flush_kthread_worker(dq->worker);
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nvme_disable_queue(dev, 0);
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