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drm/amdgpu: poll ras_controller_irq and err_event_athub_irq status
For the hardware that can not enable BIF ring for IH cookies for both ras_controller_irq and err_event_athub_irq, the driver has to poll the status register in irq handling and ack the hardware properly when there is interrupt triggered Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -153,6 +153,18 @@ irqreturn_t amdgpu_irq_handler(int irq, void *arg)
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ret = amdgpu_ih_process(adev, &adev->irq.ih);
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if (ret == IRQ_HANDLED)
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pm_runtime_mark_last_busy(dev->dev);
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/* For the hardware that cannot enable bif ring for both ras_controller_irq
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* and ras_err_evnet_athub_irq ih cookies, the driver has to poll status
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* register to check whether the interrupt is triggered or not, and properly
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* ack the interrupt if it is there
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*/
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if (adev->nbio.funcs->handle_ras_controller_intr_no_bifring)
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adev->nbio.funcs->handle_ras_controller_intr_no_bifring(adev);
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if (adev->nbio.funcs->handle_ras_err_event_athub_intr_no_bifring)
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adev->nbio.funcs->handle_ras_err_event_athub_intr_no_bifring(adev);
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return ret;
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}
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