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drm/amdgpu: poll ras_controller_irq and err_event_athub_irq status

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For the hardware that can not enable BIF ring for IH cookies for both
ras_controller_irq and err_event_athub_irq, the driver has to poll the
status register in irq handling and ack the hardware properly when there
is interrupt triggered

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Hawking Zhang 2019-06-05 14:40:57 +08:00 committed by Alex Deucher
parent 4e644fffb5
commit a344db8e5e
1 changed files with 12 additions and 0 deletions
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12
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
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@ -153,6 +153,18 @@ irqreturn_t amdgpu_irq_handler(int irq, void *arg)
ret = amdgpu_ih_process(adev, &adev->irq.ih); ret = amdgpu_ih_process(adev, &adev->irq.ih);
if (ret == IRQ_HANDLED) if (ret == IRQ_HANDLED)
pm_runtime_mark_last_busy(dev->dev); pm_runtime_mark_last_busy(dev->dev);
/* For the hardware that cannot enable bif ring for both ras_controller_irq
* and ras_err_evnet_athub_irq ih cookies, the driver has to poll status
* register to check whether the interrupt is triggered or not, and properly
* ack the interrupt if it is there
*/
if (adev->nbio.funcs->handle_ras_controller_intr_no_bifring)
adev->nbio.funcs->handle_ras_controller_intr_no_bifring(adev);
if (adev->nbio.funcs->handle_ras_err_event_athub_intr_no_bifring)
adev->nbio.funcs->handle_ras_err_event_athub_intr_no_bifring(adev);
return ret; return ret;
} }