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Merge branch 'stericsson/fixes' into next/cleanup 

Conflicts:
	arch/arm/mach-ux500/cpu.c
This commit is contained in:
Arnd Bergmann 2011-10-08 21:47:06 +02:00
parent 71f2c15375 1bf6d2c1bb
commit a3849a4c03
2 changed files with 25 additions and 1 deletions
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1
arch/arm/mach-ux500/Kconfig
View File

@ -6,6 +6,7 @@ config UX500_SOC_COMMON
select ARM_GIC
select HAS_MTU
select ARM_ERRATA_753970
select ARM_ERRATA_754322
menu "Ux500 SoC"

25
arch/arm/mach-ux500/cache-l2x0.c
View File

@ -50,7 +50,27 @@ static void ux500_l2x0_inv_all(void)
ux500_cache_sync();
}
static int ux500_l2x0_init(void)
static int __init ux500_l2x0_unlock(void)
{
int i;
/*
* Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions
* apparently locks both caches before jumping to the kernel. The
* l2x0 core will not touch the unlock registers if the l2x0 is
* already enabled, so we do it right here instead. The PL310 has
* 8 sets of registers, one per possible CPU.
*/
for (i = 0; i < 8; i++) {
writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE +
i * L2X0_LOCKDOWN_STRIDE);
writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE +
i * L2X0_LOCKDOWN_STRIDE);
}
return 0;
}
static int __init ux500_l2x0_init(void)
{
if (cpu_is_u5500())
l2x0_base = __io_address(U5500_L2CC_BASE);
@ -59,6 +79,9 @@ static int ux500_l2x0_init(void)
else
ux500_unknown_soc();
/* Unlock before init */
ux500_l2x0_unlock();
/* 64KB way size, 8 way associativity, force WA */
l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);