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ARM: sun4i: Add clock indices
The A10 gates have a non continuous set of clock IDs that are valid. Add the clock-indices property to the DT to express this. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
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1 changed files with 52 additions and 17 deletions
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@ -241,6 +241,7 @@ axi_gates: clk@01c2005c {
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compatible = "allwinner,sun4i-a10-axi-gates-clk";
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reg = <0x01c2005c 0x4>;
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clocks = <&axi>;
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clock-indices = <0>;
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clock-output-names = "axi_dram";
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};
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@ -257,17 +258,36 @@ ahb_gates: clk@01c20060 {
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compatible = "allwinner,sun4i-a10-ahb-gates-clk";
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reg = <0x01c20060 0x8>;
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clocks = <&ahb>;
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clock-indices = <0>, <1>,
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<2>, <3>,
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<4>, <5>, <6>,
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<7>, <8>, <9>,
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<10>, <11>, <12>,
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<13>, <14>, <16>,
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<17>, <18>, <20>,
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<21>, <22>, <23>,
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<24>, <25>, <26>,
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<32>, <33>, <34>,
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<35>, <36>, <37>,
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<40>, <41>, <43>,
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<44>, <45>,
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<46>, <47>,
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<50>, <52>;
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clock-output-names = "ahb_usb0", "ahb_ehci0",
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"ahb_ohci0", "ahb_ehci1", "ahb_ohci1", "ahb_ss",
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"ahb_dma", "ahb_bist", "ahb_mmc0", "ahb_mmc1",
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"ahb_mmc2", "ahb_mmc3", "ahb_ms", "ahb_nand",
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"ahb_sdram", "ahb_ace", "ahb_emac", "ahb_ts",
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"ahb_spi0", "ahb_spi1", "ahb_spi2", "ahb_spi3",
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"ahb_pata", "ahb_sata", "ahb_gps", "ahb_ve",
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"ahb_tvd", "ahb_tve0", "ahb_tve1", "ahb_lcd0",
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"ahb_lcd1", "ahb_csi0", "ahb_csi1", "ahb_hdmi",
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"ahb_de_be0", "ahb_de_be1", "ahb_de_fe0",
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"ahb_de_fe1", "ahb_mp", "ahb_mali400";
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"ahb_ohci0", "ahb_ehci1",
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"ahb_ohci1", "ahb_ss", "ahb_dma",
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"ahb_bist", "ahb_mmc0", "ahb_mmc1",
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"ahb_mmc2", "ahb_mmc3", "ahb_ms",
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"ahb_nand", "ahb_sdram", "ahb_ace",
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"ahb_emac", "ahb_ts", "ahb_spi0",
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"ahb_spi1", "ahb_spi2", "ahb_spi3",
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"ahb_pata", "ahb_sata", "ahb_gps",
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"ahb_ve", "ahb_tvd", "ahb_tve0",
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"ahb_tve1", "ahb_lcd0", "ahb_lcd1",
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"ahb_csi0", "ahb_csi1", "ahb_hdmi",
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"ahb_de_be0", "ahb_de_be1",
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"ahb_de_fe0", "ahb_de_fe1",
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"ahb_mp", "ahb_mali400";
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};
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apb0: apb0@01c20054 {
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@ -283,9 +303,14 @@ apb0_gates: clk@01c20068 {
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compatible = "allwinner,sun4i-a10-apb0-gates-clk";
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reg = <0x01c20068 0x4>;
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clocks = <&apb0>;
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clock-indices = <0>, <1>,
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<2>, <3>,
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<5>, <6>,
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<7>, <10>;
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clock-output-names = "apb0_codec", "apb0_spdif",
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"apb0_ac97", "apb0_iis", "apb0_pio", "apb0_ir0",
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"apb0_ir1", "apb0_keypad";
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"apb0_ac97", "apb0_iis",
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"apb0_pio", "apb0_ir0",
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"apb0_ir1", "apb0_keypad";
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};
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apb1: clk@01c20058 {
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@ -301,12 +326,22 @@ apb1_gates: clk@01c2006c {
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compatible = "allwinner,sun4i-a10-apb1-gates-clk";
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reg = <0x01c2006c 0x4>;
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clocks = <&apb1>;
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clock-indices = <0>, <1>,
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<2>, <4>,
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<5>, <6>,
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<7>, <16>,
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<17>, <18>,
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<19>, <20>,
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<21>, <22>,
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<23>;
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clock-output-names = "apb1_i2c0", "apb1_i2c1",
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"apb1_i2c2", "apb1_can", "apb1_scr",
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"apb1_ps20", "apb1_ps21", "apb1_uart0",
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"apb1_uart1", "apb1_uart2", "apb1_uart3",
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"apb1_uart4", "apb1_uart5", "apb1_uart6",
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"apb1_uart7";
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"apb1_i2c2", "apb1_can",
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"apb1_scr", "apb1_ps20",
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"apb1_ps21", "apb1_uart0",
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"apb1_uart1", "apb1_uart2",
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"apb1_uart3", "apb1_uart4",
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"apb1_uart5", "apb1_uart6",
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"apb1_uart7";
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};
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nand_clk: clk@01c20080 {
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