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perf_counter/powerpc: Fix cache event codes for POWER7
I had the codes for L1 D-cache load accesses and misses swapped around, and the wrong codes for LL-cache accesses and misses. This corrects them. Reported-by: Corey Ashford <cjashfor@linux.vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: <stable@kernel.org> LKML-Reference: <19103.8514.709300.585484@cargo.ozlabs.ibm.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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1 changed files with 3 additions and 3 deletions
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@ -317,7 +317,7 @@ static int power7_generic_events[] = {
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*/
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static int power7_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
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[C(L1D)] = { /* RESULT_ACCESS RESULT_MISS */
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[C(OP_READ)] = { 0x400f0, 0xc880 },
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[C(OP_READ)] = { 0xc880, 0x400f0 },
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[C(OP_WRITE)] = { 0, 0x300f0 },
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[C(OP_PREFETCH)] = { 0xd8b8, 0 },
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},
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@ -327,8 +327,8 @@ static int power7_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
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[C(OP_PREFETCH)] = { 0x408a, 0 },
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},
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[C(LL)] = { /* RESULT_ACCESS RESULT_MISS */
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[C(OP_READ)] = { 0x6080, 0x6084 },
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[C(OP_WRITE)] = { 0x6082, 0x6086 },
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[C(OP_READ)] = { 0x16080, 0x26080 },
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[C(OP_WRITE)] = { 0x16082, 0x26082 },
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[C(OP_PREFETCH)] = { 0, 0 },
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},
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[C(DTLB)] = { /* RESULT_ACCESS RESULT_MISS */
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