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PCI: hisi: Include register block base in PCIE_SYS_STATE4 address
Include the PCIE_HIP06_CTRL_OFF block base in the PCIE_SYS_STATE4 register address so reads of PCIE_SYS_STATE4 don't have to mention both. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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1 changed files with 6 additions and 6 deletions
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@ -22,11 +22,11 @@
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#include "pcie-designware.h"
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#define PCIE_LTSSM_LINKUP_STATE 0x11
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#define PCIE_LTSSM_STATE_MASK 0x3F
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#define PCIE_SUBCTRL_SYS_STATE4_REG 0x6818
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#define PCIE_SYS_STATE4 0x31c
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#define PCIE_HIP06_CTRL_OFF 0x1000
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#define PCIE_SUBCTRL_SYS_STATE4_REG 0x6818
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#define PCIE_HIP06_CTRL_OFF 0x1000
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#define PCIE_SYS_STATE4 (PCIE_HIP06_CTRL_OFF + 0x31c)
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#define PCIE_LTSSM_LINKUP_STATE 0x11
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#define PCIE_LTSSM_STATE_MASK 0x3F
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#define to_hisi_pcie(x) container_of(x, struct hisi_pcie, pp)
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@ -108,7 +108,7 @@ static int hisi_pcie_link_up_hip06(struct hisi_pcie *hisi_pcie)
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struct pcie_port *pp = &hisi_pcie->pp;
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u32 val;
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val = dw_pcie_readl_rc(pp, PCIE_HIP06_CTRL_OFF + PCIE_SYS_STATE4);
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val = dw_pcie_readl_rc(pp, PCIE_SYS_STATE4);
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return ((val & PCIE_LTSSM_STATE_MASK) == PCIE_LTSSM_LINKUP_STATE);
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}
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