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i2c: xlr: fix extra read/write at end of rx transfer
The BYTECNT register holds the transfer size minus one. Setting it to the correct value removes the need for a dummy read/write at the end of each transfer. As zero-length transfers are not supported, do not advertise I2C_FUNC_SMBUS_QUICK. In other words, this patch makes the driver transfer the number of bytes requested unless this is zero, which is not supported by the hardware and is thus refused. Signed-off-by: Mans Rullgard <mans@mansr.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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parent
75d31c2372
commit
a45af72a60
1 changed files with 27 additions and 23 deletions
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@ -89,38 +89,43 @@ static int xlr_i2c_tx(struct xlr_i2c_private *priv, u16 len,
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unsigned long timeout, stoptime, checktime;
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u32 i2c_status;
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int pos, timedout;
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u8 offset, byte;
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u8 offset;
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u32 xfer;
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if (!len)
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return -EOPNOTSUPP;
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offset = buf[0];
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xlr_i2c_wreg(priv->iobase, XLR_I2C_ADDR, offset);
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xlr_i2c_wreg(priv->iobase, XLR_I2C_DEVADDR, addr);
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xlr_i2c_wreg(priv->iobase, XLR_I2C_CFG,
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XLR_I2C_CFG_ADDR | priv->cfg->cfg_extra);
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xlr_i2c_wreg(priv->iobase, XLR_I2C_BYTECNT, len - 1);
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timeout = msecs_to_jiffies(XLR_I2C_TIMEOUT);
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stoptime = jiffies + timeout;
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timedout = 0;
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pos = 1;
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retry:
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if (len == 1) {
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xlr_i2c_wreg(priv->iobase, XLR_I2C_STARTXFR,
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XLR_I2C_STARTXFR_ND);
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xlr_i2c_wreg(priv->iobase, XLR_I2C_BYTECNT, len - 1);
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xfer = XLR_I2C_STARTXFR_ND;
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pos = 1;
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} else {
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xlr_i2c_wreg(priv->iobase, XLR_I2C_DATAOUT, buf[pos]);
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xlr_i2c_wreg(priv->iobase, XLR_I2C_STARTXFR,
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XLR_I2C_STARTXFR_WR);
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xlr_i2c_wreg(priv->iobase, XLR_I2C_BYTECNT, len - 2);
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xlr_i2c_wreg(priv->iobase, XLR_I2C_DATAOUT, buf[1]);
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xfer = XLR_I2C_STARTXFR_WR;
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pos = 2;
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}
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retry:
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/* retry can only happen on the first byte */
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xlr_i2c_wreg(priv->iobase, XLR_I2C_STARTXFR, xfer);
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while (!timedout) {
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checktime = jiffies;
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i2c_status = xlr_i2c_rdreg(priv->iobase, XLR_I2C_STATUS);
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if (i2c_status & XLR_I2C_SDOEMPTY) {
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pos++;
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/* need to do a empty dataout after the last byte */
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byte = (pos < len) ? buf[pos] : 0;
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xlr_i2c_wreg(priv->iobase, XLR_I2C_DATAOUT, byte);
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if ((i2c_status & XLR_I2C_SDOEMPTY) && pos < len) {
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xlr_i2c_wreg(priv->iobase, XLR_I2C_DATAOUT, buf[pos++]);
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/* reset timeout on successful xmit */
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stoptime = jiffies + timeout;
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@ -149,11 +154,13 @@ static int xlr_i2c_rx(struct xlr_i2c_private *priv, u16 len, u8 *buf, u16 addr)
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u32 i2c_status;
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unsigned long timeout, stoptime, checktime;
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int nbytes, timedout;
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u8 byte;
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if (!len)
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return -EOPNOTSUPP;
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xlr_i2c_wreg(priv->iobase, XLR_I2C_CFG,
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XLR_I2C_CFG_NOADDR | priv->cfg->cfg_extra);
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xlr_i2c_wreg(priv->iobase, XLR_I2C_BYTECNT, len);
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xlr_i2c_wreg(priv->iobase, XLR_I2C_BYTECNT, len - 1);
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xlr_i2c_wreg(priv->iobase, XLR_I2C_DEVADDR, addr);
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timeout = msecs_to_jiffies(XLR_I2C_TIMEOUT);
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@ -167,14 +174,11 @@ static int xlr_i2c_rx(struct xlr_i2c_private *priv, u16 len, u8 *buf, u16 addr)
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checktime = jiffies;
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i2c_status = xlr_i2c_rdreg(priv->iobase, XLR_I2C_STATUS);
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if (i2c_status & XLR_I2C_RXRDY) {
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if (nbytes > len)
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if (nbytes >= len)
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return -EIO; /* should not happen */
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/* we need to do a dummy datain when nbytes == len */
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byte = xlr_i2c_rdreg(priv->iobase, XLR_I2C_DATAIN);
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if (nbytes < len)
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buf[nbytes] = byte;
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nbytes++;
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buf[nbytes++] =
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xlr_i2c_rdreg(priv->iobase, XLR_I2C_DATAIN);
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/* reset timeout on successful read */
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stoptime = jiffies + timeout;
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@ -228,7 +232,7 @@ static int xlr_i2c_xfer(struct i2c_adapter *adap,
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static u32 xlr_func(struct i2c_adapter *adap)
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{
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/* Emulate SMBUS over I2C */
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return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
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return (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK) | I2C_FUNC_I2C;
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}
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static struct i2c_algorithm xlr_i2c_algo = {
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