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spi: s3c64xx: Convert to use GPIO descriptors
Convert the S3C64xx SPI host to use GPIO descriptors. Provide GPIO descriptor tables for the one user with CS 0 and 1. Cc: linux-samsung-soc@vger.kernel.org Cc: Sylwester Nawrocki <snawrocki@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220118230915.157797-3-linus.walleij@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Linus Walleij
Mark Brown
parent
3b5529ae7f
commit
a45cf3cc72
4 changed files with 24 additions and 55 deletions
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@ -32,10 +32,6 @@
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#include "crag6410.h"
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static struct s3c64xx_spi_csinfo wm0010_spi_csinfo = {
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.line = S3C64XX_GPC(3),
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};
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static struct wm0010_pdata wm0010_pdata = {
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.gpio_reset = S3C64XX_GPN(6),
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.reset_active_high = 1, /* Active high for Glenfarclas Rev 2 */
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@ -49,7 +45,6 @@ static struct spi_board_info wm1253_devs[] = {
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.chip_select = 0,
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.mode = SPI_MODE_0,
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.irq = S3C_EINT(4),
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.controller_data = &wm0010_spi_csinfo,
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.platform_data = &wm0010_pdata,
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},
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};
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@ -62,7 +57,6 @@ static struct spi_board_info balblair_devs[] = {
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.chip_select = 0,
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.mode = SPI_MODE_0,
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.irq = S3C_EINT(4),
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.controller_data = &wm0010_spi_csinfo,
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.platform_data = &wm0010_pdata,
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},
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};
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@ -229,10 +223,6 @@ static struct arizona_pdata wm5102_reva_pdata = {
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},
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};
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static struct s3c64xx_spi_csinfo codec_spi_csinfo = {
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.line = S3C64XX_GPN(5),
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};
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static struct spi_board_info wm5102_reva_spi_devs[] = {
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[0] = {
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.modalias = "wm5102",
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@ -242,7 +232,6 @@ static struct spi_board_info wm5102_reva_spi_devs[] = {
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.mode = SPI_MODE_0,
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.irq = GLENFARCLAS_PMIC_IRQ_BASE +
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WM831X_IRQ_GPIO_2,
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.controller_data = &codec_spi_csinfo,
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.platform_data = &wm5102_reva_pdata,
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},
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};
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@ -275,7 +264,6 @@ static struct spi_board_info wm5102_spi_devs[] = {
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.mode = SPI_MODE_0,
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.irq = GLENFARCLAS_PMIC_IRQ_BASE +
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WM831X_IRQ_GPIO_2,
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.controller_data = &codec_spi_csinfo,
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.platform_data = &wm5102_pdata,
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},
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};
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@ -298,7 +286,6 @@ static struct spi_board_info wm5110_spi_devs[] = {
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.mode = SPI_MODE_0,
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.irq = GLENFARCLAS_PMIC_IRQ_BASE +
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WM831X_IRQ_GPIO_2,
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.controller_data = &codec_spi_csinfo,
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.platform_data = &wm5102_reva_pdata,
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},
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};
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@ -825,6 +825,15 @@ static const struct gpio_led_platform_data gpio_leds_pdata = {
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static struct dwc2_hsotg_plat crag6410_hsotg_pdata;
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static struct gpiod_lookup_table crag_spi0_gpiod_table = {
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.dev_id = "s3c6410-spi.0",
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.table = {
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GPIO_LOOKUP_IDX("GPIOC", 3, "cs", 0, GPIO_ACTIVE_LOW),
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GPIO_LOOKUP_IDX("GPION", 5, "cs", 1, GPIO_ACTIVE_LOW),
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{ },
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},
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};
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static void __init crag6410_machine_init(void)
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{
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/* Open drain IRQs need pullups */
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@ -856,6 +865,8 @@ static void __init crag6410_machine_init(void)
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i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
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samsung_keypad_set_platdata(&crag6410_keypad_data);
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gpiod_add_lookup_table(&crag_spi0_gpiod_table);
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s3c64xx_spi0_set_platdata(0, 2);
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pwm_add_table(crag6410_pwm_lookup, ARRAY_SIZE(crag6410_pwm_lookup));
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@ -13,10 +13,8 @@
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/spi/spi.h>
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#include <linux/gpio.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_gpio.h>
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#include <linux/platform_data/spi-s3c64xx.h>
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@ -656,7 +654,11 @@ static int s3c64xx_spi_prepare_message(struct spi_master *master,
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struct s3c64xx_spi_csinfo *cs = spi->controller_data;
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/* Configure feedback delay */
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writel(cs->fb_delay & 0x3, sdd->regs + S3C64XX_SPI_FB_CLK);
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if (!cs)
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/* No delay if not defined */
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writel(0, sdd->regs + S3C64XX_SPI_FB_CLK);
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else
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writel(cs->fb_delay & 0x3, sdd->regs + S3C64XX_SPI_FB_CLK);
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return 0;
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}
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@ -830,34 +832,16 @@ static int s3c64xx_spi_setup(struct spi_device *spi)
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if (spi->dev.of_node) {
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cs = s3c64xx_get_slave_ctrldata(spi);
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spi->controller_data = cs;
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} else if (cs) {
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/* On non-DT platforms the SPI core will set spi->cs_gpio
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* to -ENOENT. The GPIO pin used to drive the chip select
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* is defined by using platform data so spi->cs_gpio value
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* has to be override to have the proper GPIO pin number.
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*/
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spi->cs_gpio = cs->line;
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}
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if (IS_ERR_OR_NULL(cs)) {
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/* NULL is fine, we just avoid using the FB delay (=0) */
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if (IS_ERR(cs)) {
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dev_err(&spi->dev, "No CS for SPI(%d)\n", spi->chip_select);
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return -ENODEV;
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}
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if (!spi_get_ctldata(spi)) {
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if (gpio_is_valid(spi->cs_gpio)) {
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err = gpio_request_one(spi->cs_gpio, GPIOF_OUT_INIT_HIGH,
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dev_name(&spi->dev));
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if (err) {
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dev_err(&spi->dev,
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"Failed to get /CS gpio [%d]: %d\n",
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spi->cs_gpio, err);
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goto err_gpio_req;
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}
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}
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if (!spi_get_ctldata(spi))
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spi_set_ctldata(spi, cs);
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}
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pm_runtime_get_sync(&sdd->pdev->dev);
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@ -909,11 +893,9 @@ static int s3c64xx_spi_setup(struct spi_device *spi)
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/* setup() returns with device de-selected */
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s3c64xx_spi_set_cs(spi, false);
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if (gpio_is_valid(spi->cs_gpio))
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gpio_free(spi->cs_gpio);
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spi_set_ctldata(spi, NULL);
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err_gpio_req:
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/* This was dynamically allocated on the DT path */
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if (spi->dev.of_node)
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kfree(cs);
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@ -924,19 +906,9 @@ static void s3c64xx_spi_cleanup(struct spi_device *spi)
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{
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struct s3c64xx_spi_csinfo *cs = spi_get_ctldata(spi);
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if (gpio_is_valid(spi->cs_gpio)) {
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gpio_free(spi->cs_gpio);
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if (spi->dev.of_node)
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kfree(cs);
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else {
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/* On non-DT platforms, the SPI core sets
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* spi->cs_gpio to -ENOENT and .setup()
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* overrides it with the GPIO pin value
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* passed using platform data.
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*/
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spi->cs_gpio = -ENOENT;
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}
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}
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/* This was dynamically allocated on the DT path */
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if (spi->dev.of_node)
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kfree(cs);
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spi_set_ctldata(spi, NULL);
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}
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@ -1131,6 +1103,7 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
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master->prepare_message = s3c64xx_spi_prepare_message;
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master->transfer_one = s3c64xx_spi_transfer_one;
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master->num_chipselect = sci->num_cs;
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master->use_gpio_descriptors = true;
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master->dma_alignment = 8;
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master->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(16) |
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SPI_BPW_MASK(8);
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@ -16,7 +16,6 @@ struct platform_device;
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* struct s3c64xx_spi_csinfo - ChipSelect description
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* @fb_delay: Slave specific feedback delay.
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* Refer to FB_CLK_SEL register definition in SPI chapter.
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* @line: Custom 'identity' of the CS line.
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*
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* This is per SPI-Slave Chipselect information.
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* Allocate and initialize one in machine init code and make the
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@ -24,7 +23,6 @@ struct platform_device;
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*/
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struct s3c64xx_spi_csinfo {
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u8 fb_delay;
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unsigned line;
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};
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/**
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