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ARM: imx: add common clock support for fixup mux
One register may have several fields to control some clocks. It is possible that the read/write values of some fields may map to different real functional values, so writing to the other fields in the same register may break a working clock tree. A real case is the aclk_podf field in the register 'CCM Serial Clock Multiplexer Register 1' of i.MX6Q/SDL SoC. This patch introduces a fixup hook for multiplexer clock which is called before writing a value to clock registers to support this kind of multiplexer clocks. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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3 changed files with 112 additions and 1 deletions
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@ -16,7 +16,7 @@ obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o $(i
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obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \
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clk-pfd.o clk-busy.o clk.o \
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clk-fixup-div.o
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clk-fixup-div.o clk-fixup-mux.o
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obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o
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obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o
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107
arch/arm/mach-imx/clk-fixup-mux.c
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107
arch/arm/mach-imx/clk-fixup-mux.c
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@ -0,0 +1,107 @@
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/*
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* Copyright (C) 2013 Freescale Semiconductor, Inc.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include "clk.h"
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#define to_clk_mux(_hw) container_of(_hw, struct clk_mux, hw)
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/**
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* struct clk_fixup_mux - imx integer fixup multiplexer clock
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* @mux: the parent class
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* @ops: pointer to clk_ops of parent class
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* @fixup: a hook to fixup the write value
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*
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* The imx fixup multiplexer clock is a subclass of basic clk_mux
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* with an addtional fixup hook.
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*/
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struct clk_fixup_mux {
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struct clk_mux mux;
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const struct clk_ops *ops;
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void (*fixup)(u32 *val);
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};
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static inline struct clk_fixup_mux *to_clk_fixup_mux(struct clk_hw *hw)
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{
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struct clk_mux *mux = to_clk_mux(hw);
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return container_of(mux, struct clk_fixup_mux, mux);
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}
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static u8 clk_fixup_mux_get_parent(struct clk_hw *hw)
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{
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struct clk_fixup_mux *fixup_mux = to_clk_fixup_mux(hw);
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return fixup_mux->ops->get_parent(&fixup_mux->mux.hw);
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}
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static int clk_fixup_mux_set_parent(struct clk_hw *hw, u8 index)
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{
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struct clk_fixup_mux *fixup_mux = to_clk_fixup_mux(hw);
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struct clk_mux *mux = to_clk_mux(hw);
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unsigned long flags = 0;
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u32 val;
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spin_lock_irqsave(mux->lock, flags);
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val = readl(mux->reg);
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val &= ~(mux->mask << mux->shift);
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val |= index << mux->shift;
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fixup_mux->fixup(&val);
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writel(val, mux->reg);
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spin_unlock_irqrestore(mux->lock, flags);
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return 0;
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}
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static const struct clk_ops clk_fixup_mux_ops = {
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.get_parent = clk_fixup_mux_get_parent,
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.set_parent = clk_fixup_mux_set_parent,
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};
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struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
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u8 shift, u8 width, const char **parents,
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int num_parents, void (*fixup)(u32 *val))
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{
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struct clk_fixup_mux *fixup_mux;
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struct clk *clk;
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struct clk_init_data init;
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if (!fixup)
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return ERR_PTR(-EINVAL);
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fixup_mux = kzalloc(sizeof(*fixup_mux), GFP_KERNEL);
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if (!fixup_mux)
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return ERR_PTR(-ENOMEM);
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init.name = name;
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init.ops = &clk_fixup_mux_ops;
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init.parent_names = parents;
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init.num_parents = num_parents;
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fixup_mux->mux.reg = reg;
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fixup_mux->mux.shift = shift;
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fixup_mux->mux.mask = BIT(width) - 1;
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fixup_mux->mux.lock = &imx_ccm_lock;
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fixup_mux->mux.hw.init = &init;
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fixup_mux->ops = &clk_mux_ops;
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fixup_mux->fixup = fixup;
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clk = clk_register(NULL, &fixup_mux->mux.hw);
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if (IS_ERR(clk))
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kfree(fixup_mux);
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return clk;
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}
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@ -53,6 +53,10 @@ struct clk *imx_clk_fixup_divider(const char *name, const char *parent,
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void __iomem *reg, u8 shift, u8 width,
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void (*fixup)(u32 *val));
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struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
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u8 shift, u8 width, const char **parents,
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int num_parents, void (*fixup)(u32 *val));
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static inline struct clk *imx_clk_fixed(const char *name, int rate)
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{
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return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
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