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net: hns3: split function hns3_get_tx_timeo_queue_info()
Function hns3_get_tx_timeo_queue_info() is a bit too long. So add two new functions hns3_dump_queue_stats() and hns3_dump_queue_reg() to simplify code and improve code readability. Signed-off-by: Yufeng Mo <moyufeng@huawei.com> Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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e6fe5e1671
commit
a4ae2bc0ab
2 changed files with 57 additions and 48 deletions
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@ -2659,18 +2659,8 @@ static int hns3_nic_change_mtu(struct net_device *netdev, int new_mtu)
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return ret;
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return ret;
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}
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}
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static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
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static int hns3_get_timeout_queue(struct net_device *ndev)
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{
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{
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struct hns3_nic_priv *priv = netdev_priv(ndev);
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struct hnae3_handle *h = hns3_get_handle(ndev);
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struct hns3_enet_ring *tx_ring;
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struct napi_struct *napi;
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int timeout_queue = 0;
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int hw_head, hw_tail;
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int fbd_num, fbd_oft;
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int ebd_num, ebd_oft;
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int bd_num, bd_err;
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int ring_en, tc;
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int i;
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int i;
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/* Find the stopped queue the same way the stack does */
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/* Find the stopped queue the same way the stack does */
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@ -2690,7 +2680,6 @@ static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
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dql->last_obj_cnt, dql->num_queued,
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dql->last_obj_cnt, dql->num_queued,
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dql->adj_limit, dql->num_completed);
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dql->adj_limit, dql->num_completed);
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#endif
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#endif
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timeout_queue = i;
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netdev_info(ndev, "queue state: 0x%lx, delta msecs: %u\n",
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netdev_info(ndev, "queue state: 0x%lx, delta msecs: %u\n",
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q->state,
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q->state,
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jiffies_to_msecs(jiffies - trans_start));
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jiffies_to_msecs(jiffies - trans_start));
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@ -2698,17 +2687,15 @@ static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
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}
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}
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}
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}
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if (i == ndev->num_tx_queues) {
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return i;
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netdev_info(ndev,
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}
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"no netdev TX timeout queue found, timeout count: %llu\n",
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priv->tx_timeout_count);
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return false;
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}
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priv->tx_timeout_count++;
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static void hns3_dump_queue_stats(struct net_device *ndev,
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struct hns3_enet_ring *tx_ring,
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tx_ring = &priv->ring[timeout_queue];
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int timeout_queue)
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napi = &tx_ring->tqp_vector->napi;
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{
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struct napi_struct *napi = &tx_ring->tqp_vector->napi;
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struct hns3_nic_priv *priv = netdev_priv(ndev);
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netdev_info(ndev,
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netdev_info(ndev,
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"tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, napi state: %lu\n",
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"tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, napi state: %lu\n",
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@ -2724,6 +2711,48 @@ static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
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"seg_pkt_cnt: %llu, tx_more: %llu, restart_queue: %llu, tx_busy: %llu\n",
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"seg_pkt_cnt: %llu, tx_more: %llu, restart_queue: %llu, tx_busy: %llu\n",
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tx_ring->stats.seg_pkt_cnt, tx_ring->stats.tx_more,
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tx_ring->stats.seg_pkt_cnt, tx_ring->stats.tx_more,
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tx_ring->stats.restart_queue, tx_ring->stats.tx_busy);
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tx_ring->stats.restart_queue, tx_ring->stats.tx_busy);
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}
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static void hns3_dump_queue_reg(struct net_device *ndev,
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struct hns3_enet_ring *tx_ring)
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{
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netdev_info(ndev,
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"BD_NUM: 0x%x HW_HEAD: 0x%x, HW_TAIL: 0x%x, BD_ERR: 0x%x, INT: 0x%x\n",
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hns3_tqp_read_reg(tx_ring, HNS3_RING_TX_RING_BD_NUM_REG),
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hns3_tqp_read_reg(tx_ring, HNS3_RING_TX_RING_HEAD_REG),
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hns3_tqp_read_reg(tx_ring, HNS3_RING_TX_RING_TAIL_REG),
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hns3_tqp_read_reg(tx_ring, HNS3_RING_TX_RING_BD_ERR_REG),
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readl(tx_ring->tqp_vector->mask_addr));
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netdev_info(ndev,
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"RING_EN: 0x%x, TC: 0x%x, FBD_NUM: 0x%x FBD_OFT: 0x%x, EBD_NUM: 0x%x, EBD_OFT: 0x%x\n",
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hns3_tqp_read_reg(tx_ring, HNS3_RING_EN_REG),
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hns3_tqp_read_reg(tx_ring, HNS3_RING_TX_RING_TC_REG),
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hns3_tqp_read_reg(tx_ring, HNS3_RING_TX_RING_FBDNUM_REG),
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hns3_tqp_read_reg(tx_ring, HNS3_RING_TX_RING_OFFSET_REG),
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hns3_tqp_read_reg(tx_ring, HNS3_RING_TX_RING_EBDNUM_REG),
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hns3_tqp_read_reg(tx_ring,
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HNS3_RING_TX_RING_EBD_OFFSET_REG));
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}
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static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
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{
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struct hns3_nic_priv *priv = netdev_priv(ndev);
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struct hnae3_handle *h = hns3_get_handle(ndev);
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struct hns3_enet_ring *tx_ring;
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int timeout_queue;
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timeout_queue = hns3_get_timeout_queue(ndev);
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if (timeout_queue >= ndev->num_tx_queues) {
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netdev_info(ndev,
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"no netdev TX timeout queue found, timeout count: %llu\n",
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priv->tx_timeout_count);
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return false;
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}
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priv->tx_timeout_count++;
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tx_ring = &priv->ring[timeout_queue];
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hns3_dump_queue_stats(ndev, tx_ring, timeout_queue);
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/* When mac received many pause frames continuous, it's unable to send
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/* When mac received many pause frames continuous, it's unable to send
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* packets, which may cause tx timeout
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* packets, which may cause tx timeout
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@ -2736,32 +2765,7 @@ static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
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mac_stats.tx_pause_cnt, mac_stats.rx_pause_cnt);
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mac_stats.tx_pause_cnt, mac_stats.rx_pause_cnt);
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}
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}
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hw_head = readl_relaxed(tx_ring->tqp->io_base +
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hns3_dump_queue_reg(ndev, tx_ring);
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HNS3_RING_TX_RING_HEAD_REG);
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hw_tail = readl_relaxed(tx_ring->tqp->io_base +
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HNS3_RING_TX_RING_TAIL_REG);
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fbd_num = readl_relaxed(tx_ring->tqp->io_base +
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HNS3_RING_TX_RING_FBDNUM_REG);
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fbd_oft = readl_relaxed(tx_ring->tqp->io_base +
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HNS3_RING_TX_RING_OFFSET_REG);
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ebd_num = readl_relaxed(tx_ring->tqp->io_base +
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HNS3_RING_TX_RING_EBDNUM_REG);
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ebd_oft = readl_relaxed(tx_ring->tqp->io_base +
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HNS3_RING_TX_RING_EBD_OFFSET_REG);
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bd_num = readl_relaxed(tx_ring->tqp->io_base +
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HNS3_RING_TX_RING_BD_NUM_REG);
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bd_err = readl_relaxed(tx_ring->tqp->io_base +
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HNS3_RING_TX_RING_BD_ERR_REG);
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ring_en = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_EN_REG);
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tc = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_TX_RING_TC_REG);
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netdev_info(ndev,
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"BD_NUM: 0x%x HW_HEAD: 0x%x, HW_TAIL: 0x%x, BD_ERR: 0x%x, INT: 0x%x\n",
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bd_num, hw_head, hw_tail, bd_err,
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readl(tx_ring->tqp_vector->mask_addr));
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netdev_info(ndev,
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"RING_EN: 0x%x, TC: 0x%x, FBD_NUM: 0x%x FBD_OFT: 0x%x, EBD_NUM: 0x%x, EBD_OFT: 0x%x\n",
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ring_en, tc, fbd_num, fbd_oft, ebd_num, ebd_oft);
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return true;
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return true;
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}
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}
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@ -621,6 +621,11 @@ static inline int ring_space(struct hns3_enet_ring *ring)
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(begin - end)) - 1;
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(begin - end)) - 1;
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}
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}
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static inline u32 hns3_tqp_read_reg(struct hns3_enet_ring *ring, u32 reg)
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{
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return readl_relaxed(ring->tqp->io_base + reg);
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}
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static inline u32 hns3_read_reg(void __iomem *base, u32 reg)
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static inline u32 hns3_read_reg(void __iomem *base, u32 reg)
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{
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{
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return readl(base + reg);
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return readl(base + reg);
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