ARM: SoC code updates for 6.9
These are mostly minor updates, including a number of kerneldoc fixes from Randy Dunlap across multiple platforms. OMAP gets a few bugfixes, and the MAINTAINERS file gets updated for AMD Zynq and NXP S32G. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmXvMZUACgkQYKtH/8kJ Uif4aw/8CGMOuzR1JrOeHyS9EwHP/zbxz6zroLI9gL+WrcbeAXZ5N+h/QTzMwccd nOirlKjtYdvUGe2nheXPVSLzHiPQhJPOdrE9Yjo/cy5tvkMC1WUJ7pL96gs2G3K+ KrPFHbrYzYJHMp3ns/BFaal+7gM7joep6FB5TkhQU5hP745XoKedcFZwxENGsvH+ nIKgT4ICBXb2hO/Co5f8N2hhVVpR/U+lkEnslJd0UxF3eU5AIXuyh0/adNZA1R1n NDUmOyBc2j6W2mIUBA4axrWNwB6RnJh8fto/n4ouh0+w/Yi5TP66c6I2uE7gYDNR CaIZ3hfMREgjpqvxIzqMgJwB0INi1PiNUjRZbt5oID1VKNdRBQxyHYyWLHx+99gh iSlc4a0X71ZuvJVw6KDnRWDwXUCdL6Aeqw2ML1TFlUSYI5nhakyoMZZAjJBRFRLF zZlab1KUoSsfG3L2nGf2CmCsXDDe4HRe7HUYul1gs5fv/P/f/IBGT5lbtyqaiQ7C p0aIIzqwIgIqOSnkyKyn8WOHH15gUMUcYJN7n4Ojke/fav033lJN7An0HieYikNJ T+PvioB28B0hnJ4b5h40YY1vzop4ygYeIlAR6hDcoHsuV+sAU0CgSkULuZKJBjcO NNm5EX4bBlSESHDY9rRCdiDVTuPIvlJUKwMxqDm5QZLkVNyGLAc= =6zc9 -----END PGP SIGNATURE----- Merge tag 'soc-arm-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC code updates from Arnd Bergmann: "These are mostly minor updates, including a number of kerneldoc fixes from Randy Dunlap across multiple platforms. OMAP gets a few bugfixes, and the MAINTAINERS file gets updated for AMD Zynq and NXP S32G" * tag 'soc-arm-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (23 commits) ARM: s32c: update MAINTAINERS entry ARM: AM33xx: PRM: Implement REBOOT_COLD ARM: AM33xx: PRM: Remove redundand defines ARM: omap1: remove duplicated 'select ARCH_OMAP' ARM: s3c64xx: make bus_type const ARM: imx: Remove usage of the deprecated ida_simple_xx() API ARM: OMAP2+: fix kernel-doc warnings ARM: OMAP2+: fix kernel-doc warnings ARM: OMAP2+: fix a kernel-doc warning ARM: OMAP2+: PRM: fix kernel-doc warnings ARM: OMAP2+: prm44xx: fix a kernel-doc warning ARM: OMAP2+: pmic-cpcap: fix kernel-doc warnings ARM: OMAP2+: hwmod: fix kernel-doc warnings ARM: OMAP2+: hwmod: remove misuse of kernel-doc ARM: OMAP2+: CMINST: use matching function name in kernel-doc ARM: OMAP2+: cm33xx: use matching function name in kernel-doc ARM: OMAP2+: clock: fix a function name in kernel-doc ARM: OMAP2+: clockdomain: fix kernel-doc warnings ARM: OMAP2+: am33xx-restart: fix function name in kernel-doc soc: xilinx: update maintainer of event manager driver ...
This commit is contained in:
Linus Torvalds
commit
a60816720d
20
MAINTAINERS
20
MAINTAINERS
|
|
@ -2549,13 +2549,14 @@ F: drivers/*/*/*wpcm*
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|||
F: drivers/*/*wpcm*
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||||
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||||
ARM/NXP S32G ARCHITECTURE
|
||||
M: Chester Lin <chester62515@gmail.com>
|
||||
R: Andreas Färber <afaerber@suse.de>
|
||||
R: Chester Lin <chester62515@gmail.com>
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R: Matthias Brugger <mbrugger@suse.com>
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||||
R: NXP S32 Linux Team <s32@nxp.com>
|
||||
R: Ghennadi Procopciuc <ghennadi.procopciuc@oss.nxp.com>
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L: NXP S32 Linux Team <s32@nxp.com>
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||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: arch/arm64/boot/dts/freescale/s32g*.dts*
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F: drivers/pinctrl/nxp/
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|
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ARM/Orion SoC/Technologic Systems TS-78xx platform support
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M: Alexander Clouter <alex@digriz.org.uk>
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@ -17290,9 +17291,12 @@ M: Shawn Guo <shawnguo@kernel.org>
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M: Jacky Bai <ping.bai@nxp.com>
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R: Pengutronix Kernel Team <kernel@pengutronix.de>
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L: linux-gpio@vger.kernel.org
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L: NXP S32 Linux Team <s32@nxp.com>
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S: Maintained
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F: Documentation/devicetree/bindings/pinctrl/fsl,*
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F: Documentation/devicetree/bindings/pinctrl/nxp,s32*
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F: drivers/pinctrl/freescale/
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F: drivers/pinctrl/nxp/
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PIN CONTROLLER - INTEL
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M: Mika Westerberg <mika.westerberg@linux.intel.com>
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@ -17346,14 +17350,6 @@ S: Supported
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F: drivers/gpio/gpio-sama5d2-piobu.c
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F: drivers/pinctrl/pinctrl-at91*
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PIN CONTROLLER - NXP S32
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M: Chester Lin <clin@suse.com>
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R: NXP S32 Linux Team <s32@nxp.com>
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L: linux-gpio@vger.kernel.org
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S: Maintained
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F: Documentation/devicetree/bindings/pinctrl/nxp,s32*
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F: drivers/pinctrl/nxp/
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PIN CONTROLLER - QUALCOMM
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M: Bjorn Andersson <andersson@kernel.org>
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L: linux-arm-msm@vger.kernel.org
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@ -24159,7 +24155,7 @@ F: Documentation/devicetree/bindings/net/can/xilinx,can.yaml
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F: drivers/net/can/xilinx_can.c
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XILINX EVENT MANAGEMENT DRIVER
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M: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
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M: Michal Simek <michal.simek@amd.com>
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S: Maintained
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F: drivers/soc/xilinx/xlnx_event_manager.c
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F: include/linux/firmware/xlnx-event-manager.h
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@ -452,7 +452,7 @@ static int mmdc_pmu_init(struct mmdc_pmu *pmu_mmdc,
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.active_events = 0,
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};
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pmu_mmdc->id = ida_simple_get(&mmdc_ida, 0, 0, GFP_KERNEL);
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pmu_mmdc->id = ida_alloc(&mmdc_ida, GFP_KERNEL);
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return pmu_mmdc->id;
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}
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@ -461,7 +461,7 @@ static void imx_mmdc_remove(struct platform_device *pdev)
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{
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struct mmdc_pmu *pmu_mmdc = platform_get_drvdata(pdev);
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ida_simple_remove(&mmdc_ida, pmu_mmdc->id);
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ida_free(&mmdc_ida, pmu_mmdc->id);
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cpuhp_state_remove_instance_nocalls(cpuhp_mmdc_state, &pmu_mmdc->node);
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perf_pmu_unregister(&pmu_mmdc->pmu);
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iounmap(pmu_mmdc->mmdc_base);
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@ -529,7 +529,7 @@ pmu_register_err:
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cpuhp_state_remove_instance_nocalls(cpuhp_mmdc_state, &pmu_mmdc->node);
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hrtimer_cancel(&pmu_mmdc->hrtimer);
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pmu_release_id:
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ida_simple_remove(&mmdc_ida, pmu_mmdc->id);
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ida_free(&mmdc_ida, pmu_mmdc->id);
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pmu_free:
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kfree(pmu_mmdc);
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return ret;
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|
|
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|
|
@ -4,7 +4,6 @@ menuconfig ARCH_OMAP1
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depends on ARCH_MULTI_V4T || ARCH_MULTI_V5
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depends on CPU_LITTLE_ENDIAN
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depends on ATAGS
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select ARCH_OMAP
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select ARCH_HAS_HOLES_MEMORYMODEL
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select ARCH_OMAP
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select CLKSRC_MMIO
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|
|
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|
@ -9,7 +9,7 @@
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#include "prm.h"
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/**
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* am3xx_restart - trigger a software restart of the SoC
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* am33xx_restart - trigger a software restart of the SoC
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* @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c
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* @cmd: passed from the userspace program rebooting the system (if provided)
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*
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|
|
@ -18,7 +18,8 @@
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*/
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void am33xx_restart(enum reboot_mode mode, const char *cmd)
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{
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/* TODO: Handle mode and cmd if necessary */
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/* TODO: Handle cmd if necessary */
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prm_reboot_mode = mode;
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omap_prm_reset_system();
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}
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|
|
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|||
|
|
@ -246,6 +246,12 @@ DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)")
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.init_time = omap_init_time_of,
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.dt_compat = am33xx_boards_compat,
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.restart = am33xx_restart,
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/*
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* Historically am33xx supported only REBOOT_WARM even though default
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* reboot_mode was REBOOT_COLD. Reflect legacy de-facto behaviour in
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* SYSFS.
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*/
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.reboot_mode = REBOOT_WARM,
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MACHINE_END
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#endif
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|
|
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|
|
@ -162,7 +162,7 @@ static int omap2_select_table_rate(struct clk_hw *hw, unsigned long rate,
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}
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/**
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* omap2xxx_clkt_vps_check_bootloader_rate - determine which of the rate
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* omap2xxx_clkt_vps_check_bootloader_rates - determine which of the rate
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* table sets matches the current CORE DPLL hardware rate
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*
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* Check the MPU rate set by bootloader. Sets the 'curr_prcm_set'
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|
|
|
|||
|
|
@ -990,7 +990,7 @@ void clkdm_allow_idle(struct clockdomain *clkdm)
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|||
}
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/**
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* clkdm_deny_idle - disable hwsup idle transitions for clkdm
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* clkdm_deny_idle_nolock - disable hwsup idle transitions for clkdm
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* @clkdm: struct clockdomain *
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*
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* Prevent the hardware from automatically switching the clockdomain
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|
|
@ -1110,7 +1110,7 @@ void clkdm_del_autodeps(struct clockdomain *clkdm)
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/**
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* clkdm_clk_enable - add an enabled downstream clock to this clkdm
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* @clkdm: struct clockdomain *
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* @clk: struct clk * of the enabled downstream clock
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* @unused: struct clk * of the enabled downstream clock
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*
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* Increment the usecount of the clockdomain @clkdm and ensure that it
|
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* is awake before @clk is enabled. Intended to be called by
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|
|
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|
|
@ -357,7 +357,7 @@ static int am33xx_clkdm_save_context(struct clockdomain *clkdm)
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|||
}
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|
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/**
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* am33xx_restore_save_context - Restore the clockdomain transition context
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* am33xx_clkdm_restore_context - Restore the clockdomain transition context
|
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* @clkdm: The clockdomain pointer whose context needs to be restored
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*
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* Restore the clockdomain transition context.
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|
|
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|
|
@ -237,7 +237,7 @@ static void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs)
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}
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/**
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* omap4_cminst_clkdm_force_sleep - try to take a clockdomain out of idle
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* omap4_cminst_clkdm_force_wakeup - try to take a clockdomain out of idle
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* @part: PRCM partition ID that the clockdomain registers exist in
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* @inst: CM instance register offset (*_INST macro)
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* @cdoffs: Clockdomain register offset (*_CDOFFS macro)
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|
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@ -47,7 +47,7 @@ static void __init omap_optee_init_check(void)
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}
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/**
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* omap_sec_dispatcher: Routine to dispatch low power secure
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* omap_secure_dispatcher - Routine to dispatch low power secure
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* service routines
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* @idx: The HAL API index
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* @flag: The flag indicating criticality of operation
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@ -183,7 +183,7 @@ static u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs,
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/**
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* rx51_secure_update_aux_cr: Routine to modify the contents of Auxiliary Control Register
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* @set_bits: bits to set in ACR
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* @clr_bits: bits to clear in ACR
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* @clear_bits: bits to clear in ACR
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*
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* Return the non-zero error value on failure.
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*/
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|
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|
|
@ -900,7 +900,7 @@ static int _init_interface_clks(struct omap_hwmod *oh)
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}
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/**
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* _init_opt_clk - get a struct clk * for the hwmod's optional clocks
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* _init_opt_clks - get a struct clk * for the hwmod's optional clocks
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* @oh: struct omap_hwmod *
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*
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* Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
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@ -2297,7 +2297,7 @@ static void __init parse_module_flags(struct omap_hwmod *oh,
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/**
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* _init - initialize internal data for the hwmod @oh
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* @oh: struct omap_hwmod *
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* @n: (unused)
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* @data: (unused)
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*
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* Look up the clocks and the address space used by the MPU to access
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* registers belonging to the hwmod @oh. @oh must already be
|
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|
@ -2493,7 +2493,7 @@ static void _setup_postsetup(struct omap_hwmod *oh)
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/**
|
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* _setup - prepare IP block hardware for use
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* @oh: struct omap_hwmod *
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* @n: (unused, pass NULL)
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* @data: (unused, pass NULL)
|
||||
*
|
||||
* Configure the IP block represented by @oh. This may include
|
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* enabling the IP block, resetting it, and placing it into a
|
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|
|
@ -3367,8 +3367,9 @@ static int omap_hwmod_check_module(struct device *dev,
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* omap_hwmod_allocate_module - allocate new module
|
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* @dev: struct device
|
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* @oh: module
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* @data: module data
|
||||
* @sysc_fields: sysc register bits
|
||||
* @clockdomain: clockdomain
|
||||
* @clkdm: clockdomain
|
||||
* @rev_offs: revision register offset
|
||||
* @sysc_offs: sysconfig register offset
|
||||
* @syss_offs: sysstatus register offset
|
||||
|
|
|
|||
|
|
@ -20,7 +20,7 @@
|
|||
|
||||
#include "omap_hwmod_common_data.h"
|
||||
|
||||
/**
|
||||
/*
|
||||
* struct omap_hwmod_sysc_type1 - TYPE1 sysconfig scheme.
|
||||
*
|
||||
* To be used by hwmod structure to specify the sysconfig offsets
|
||||
|
|
@ -36,7 +36,7 @@ struct sysc_regbits omap_hwmod_sysc_type1 = {
|
|||
.autoidle_shift = SYSC_TYPE1_AUTOIDLE_SHIFT,
|
||||
};
|
||||
|
||||
/**
|
||||
/*
|
||||
* struct omap_hwmod_sysc_type2 - TYPE2 sysconfig scheme.
|
||||
*
|
||||
* To be used by hwmod structure to specify the sysconfig offsets if the
|
||||
|
|
@ -50,7 +50,7 @@ struct sysc_regbits omap_hwmod_sysc_type2 = {
|
|||
.dmadisable_shift = SYSC_TYPE2_DMADISABLE_SHIFT,
|
||||
};
|
||||
|
||||
/**
|
||||
/*
|
||||
* struct omap_hwmod_sysc_type3 - TYPE3 sysconfig scheme.
|
||||
* Used by some IPs on AM33xx
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -18,10 +18,10 @@
|
|||
#include "vc.h"
|
||||
|
||||
/**
|
||||
* omap_cpcap_vsel_to_vdc - convert CPCAP VSEL value to microvolts DC
|
||||
* omap_cpcap_vsel_to_uv - convert CPCAP VSEL value to microvolts DC
|
||||
* @vsel: CPCAP VSEL value to convert
|
||||
*
|
||||
* Returns the microvolts DC that the CPCAP PMIC should generate when
|
||||
* Returns: the microvolts DC that the CPCAP PMIC should generate when
|
||||
* programmed with @vsel.
|
||||
*/
|
||||
static unsigned long omap_cpcap_vsel_to_uv(unsigned char vsel)
|
||||
|
|
@ -35,7 +35,7 @@ static unsigned long omap_cpcap_vsel_to_uv(unsigned char vsel)
|
|||
* omap_cpcap_uv_to_vsel - convert microvolts DC to CPCAP VSEL value
|
||||
* @uv: microvolts DC to convert
|
||||
*
|
||||
* Returns the VSEL value necessary for the CPCAP PMIC to
|
||||
* Returns: the VSEL value necessary for the CPCAP PMIC to
|
||||
* generate an output voltage equal to or greater than @uv microvolts DC.
|
||||
*/
|
||||
static unsigned char omap_cpcap_uv_to_vsel(unsigned long uv)
|
||||
|
|
@ -82,10 +82,10 @@ static struct omap_voltdm_pmic omap_cpcap_iva = {
|
|||
};
|
||||
|
||||
/**
|
||||
* omap_max8952_vsel_to_vdc - convert MAX8952 VSEL value to microvolts DC
|
||||
* omap_max8952_vsel_to_uv - convert MAX8952 VSEL value to microvolts DC
|
||||
* @vsel: MAX8952 VSEL value to convert
|
||||
*
|
||||
* Returns the microvolts DC that the MAX8952 Regulator should generate when
|
||||
* Returns: the microvolts DC that the MAX8952 Regulator should generate when
|
||||
* programmed with @vsel.
|
||||
*/
|
||||
static unsigned long omap_max8952_vsel_to_uv(unsigned char vsel)
|
||||
|
|
@ -99,7 +99,7 @@ static unsigned long omap_max8952_vsel_to_uv(unsigned char vsel)
|
|||
* omap_max8952_uv_to_vsel - convert microvolts DC to MAX8952 VSEL value
|
||||
* @uv: microvolts DC to convert
|
||||
*
|
||||
* Returns the VSEL value necessary for the MAX8952 Regulator to
|
||||
* Returns: the VSEL value necessary for the MAX8952 Regulator to
|
||||
* generate an output voltage equal to or greater than @uv microvolts DC.
|
||||
*/
|
||||
static unsigned char omap_max8952_uv_to_vsel(unsigned long uv)
|
||||
|
|
@ -129,10 +129,10 @@ static struct omap_voltdm_pmic omap443x_max8952_mpu = {
|
|||
};
|
||||
|
||||
/**
|
||||
* omap_fan5355_vsel_to_vdc - convert FAN535503 VSEL value to microvolts DC
|
||||
* omap_fan535503_vsel_to_uv - convert FAN535503 VSEL value to microvolts DC
|
||||
* @vsel: FAN535503 VSEL value to convert
|
||||
*
|
||||
* Returns the microvolts DC that the FAN535503 Regulator should generate when
|
||||
* Returns: the microvolts DC that the FAN535503 Regulator should generate when
|
||||
* programmed with @vsel.
|
||||
*/
|
||||
static unsigned long omap_fan535503_vsel_to_uv(unsigned char vsel)
|
||||
|
|
@ -144,10 +144,10 @@ static unsigned long omap_fan535503_vsel_to_uv(unsigned char vsel)
|
|||
}
|
||||
|
||||
/**
|
||||
* omap_fan535508_vsel_to_vdc - convert FAN535508 VSEL value to microvolts DC
|
||||
* omap_fan535508_vsel_to_uv - convert FAN535508 VSEL value to microvolts DC
|
||||
* @vsel: FAN535508 VSEL value to convert
|
||||
*
|
||||
* Returns the microvolts DC that the FAN535508 Regulator should generate when
|
||||
* Returns: the microvolts DC that the FAN535508 Regulator should generate when
|
||||
* programmed with @vsel.
|
||||
*/
|
||||
static unsigned long omap_fan535508_vsel_to_uv(unsigned char vsel)
|
||||
|
|
@ -165,7 +165,7 @@ static unsigned long omap_fan535508_vsel_to_uv(unsigned char vsel)
|
|||
* omap_fan535503_uv_to_vsel - convert microvolts DC to FAN535503 VSEL value
|
||||
* @uv: microvolts DC to convert
|
||||
*
|
||||
* Returns the VSEL value necessary for the MAX8952 Regulator to
|
||||
* Returns: the VSEL value necessary for the MAX8952 Regulator to
|
||||
* generate an output voltage equal to or greater than @uv microvolts DC.
|
||||
*/
|
||||
static unsigned char omap_fan535503_uv_to_vsel(unsigned long uv)
|
||||
|
|
@ -184,7 +184,7 @@ static unsigned char omap_fan535503_uv_to_vsel(unsigned long uv)
|
|||
* omap_fan535508_uv_to_vsel - convert microvolts DC to FAN535508 VSEL value
|
||||
* @uv: microvolts DC to convert
|
||||
*
|
||||
* Returns the VSEL value necessary for the MAX8952 Regulator to
|
||||
* Returns: the VSEL value necessary for the MAX8952 Regulator to
|
||||
* generate an output voltage equal to or greater than @uv microvolts DC.
|
||||
*/
|
||||
static unsigned char omap_fan535508_uv_to_vsel(unsigned long uv)
|
||||
|
|
|
|||
|
|
@ -1162,7 +1162,7 @@ static int pwrdm_save_context(struct powerdomain *pwrdm, void *unused)
|
|||
}
|
||||
|
||||
/**
|
||||
* pwrdm_save_context - restore powerdomain registers
|
||||
* pwrdm_restore_context - restore powerdomain registers
|
||||
*
|
||||
* Restore powerdomain control registers after a suspend or resume
|
||||
* event.
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@
|
|||
#define AM33XX_GFX_MEM_STATEST_MASK (0x3 << 4)
|
||||
#define AM33XX_GLOBAL_WARM_SW_RST_MASK (1 << 1)
|
||||
#define AM33XX_RST_GLOBAL_WARM_SW_MASK (1 << 0)
|
||||
#define AM33XX_RST_GLOBAL_COLD_SW_MASK (1 << 1)
|
||||
#define AM33XX_PRUSS_MEM_ONSTATE_MASK (0x3 << 5)
|
||||
#define AM33XX_PRUSS_MEM_RETSTATE_MASK (1 << 7)
|
||||
#define AM33XX_PRUSS_MEM_STATEST_MASK (0x3 << 23)
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@
|
|||
# ifndef __ASSEMBLER__
|
||||
extern struct omap_domain_base prm_base;
|
||||
extern u16 prm_features;
|
||||
extern enum reboot_mode prm_reboot_mode;
|
||||
int omap_prcm_init(void);
|
||||
int omap2_prcm_base_init(void);
|
||||
# endif
|
||||
|
|
|
|||
|
|
@ -10,15 +10,12 @@
|
|||
#include <linux/errno.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/reboot.h>
|
||||
|
||||
#include "powerdomain.h"
|
||||
#include "prm33xx.h"
|
||||
#include "prm-regbits-33xx.h"
|
||||
|
||||
#define AM33XX_PRM_RSTCTRL_OFFSET 0x0000
|
||||
|
||||
#define AM33XX_RST_GLOBAL_WARM_SW_MASK (1 << 0)
|
||||
|
||||
/* Read a register in a PRM instance */
|
||||
static u32 am33xx_prm_read_reg(s16 inst, u16 idx)
|
||||
{
|
||||
|
|
@ -322,10 +319,19 @@ static int am33xx_check_vcvp(void)
|
|||
*
|
||||
* Immediately reboots the device through warm reset.
|
||||
*/
|
||||
static void am33xx_prm_global_warm_sw_reset(void)
|
||||
static void am33xx_prm_global_sw_reset(void)
|
||||
{
|
||||
am33xx_prm_rmw_reg_bits(AM33XX_RST_GLOBAL_WARM_SW_MASK,
|
||||
AM33XX_RST_GLOBAL_WARM_SW_MASK,
|
||||
/*
|
||||
* Historically AM33xx performed warm reset for all requested reboot_mode.
|
||||
* Keep this behaviour unchanged for all except newly added REBOOT_COLD.
|
||||
*/
|
||||
u32 mask = AM33XX_RST_GLOBAL_WARM_SW_MASK;
|
||||
|
||||
if (prm_reboot_mode == REBOOT_COLD)
|
||||
mask = AM33XX_RST_GLOBAL_COLD_SW_MASK;
|
||||
|
||||
am33xx_prm_rmw_reg_bits(mask,
|
||||
mask,
|
||||
AM33XX_PRM_DEVICE_MOD,
|
||||
AM33XX_PRM_RSTCTRL_OFFSET);
|
||||
|
||||
|
|
@ -386,7 +392,7 @@ static struct prm_ll_data am33xx_prm_ll_data = {
|
|||
.assert_hardreset = am33xx_prm_assert_hardreset,
|
||||
.deassert_hardreset = am33xx_prm_deassert_hardreset,
|
||||
.is_hardreset_asserted = am33xx_prm_is_hardreset_asserted,
|
||||
.reset_system = am33xx_prm_global_warm_sw_reset,
|
||||
.reset_system = am33xx_prm_global_sw_reset,
|
||||
};
|
||||
|
||||
int __init am33xx_prm_init(const struct omap_prcm_init_data *data)
|
||||
|
|
|
|||
|
|
@ -407,7 +407,7 @@ static bool omap44xx_prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx)
|
|||
}
|
||||
|
||||
/**
|
||||
* omap44xx_prm_clear_context_lost_flags_old - clear context loss flags
|
||||
* omap44xx_prm_clear_context_loss_flags_old - clear context loss flags
|
||||
* @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION)
|
||||
* @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST)
|
||||
* @idx: CONTEXT register offset
|
||||
|
|
|
|||
|
|
@ -66,6 +66,12 @@ struct omap_domain_base prm_base;
|
|||
|
||||
u16 prm_features;
|
||||
|
||||
/*
|
||||
* Platforms that implement different reboot modes can store the requested
|
||||
* mode here.
|
||||
*/
|
||||
enum reboot_mode prm_reboot_mode;
|
||||
|
||||
/*
|
||||
* prm_ll_data: function pointers to SoC-specific implementations of
|
||||
* common PRM functions
|
||||
|
|
@ -370,7 +376,7 @@ bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx)
|
|||
}
|
||||
|
||||
/**
|
||||
* prm_clear_context_lost_flags_old - clear context loss flags (old API)
|
||||
* prm_clear_context_loss_flags_old - clear context loss flags (old API)
|
||||
* @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION)
|
||||
* @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST)
|
||||
* @idx: CONTEXT register offset
|
||||
|
|
@ -497,6 +503,7 @@ int omap_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask)
|
|||
|
||||
/**
|
||||
* omap_prm_vp_check_txdone - check voltage processor TX done status
|
||||
* @vp_id: unique VP instance ID
|
||||
*
|
||||
* Checks if voltage processor transmission has been completed.
|
||||
* Returns non-zero if a transmission has completed, 0 otherwise.
|
||||
|
|
@ -514,6 +521,7 @@ u32 omap_prm_vp_check_txdone(u8 vp_id)
|
|||
|
||||
/**
|
||||
* omap_prm_vp_clear_txdone - clears voltage processor TX done status
|
||||
* @vp_id: unique VP instance ID
|
||||
*
|
||||
* Clears the status bit for completed voltage processor transmission
|
||||
* returned by prm_vp_check_txdone.
|
||||
|
|
|
|||
|
|
@ -57,7 +57,7 @@ int omap2_wd_timer_disable(struct omap_hwmod *oh)
|
|||
}
|
||||
|
||||
/**
|
||||
* omap2_wdtimer_reset - reset and disable the WDTIMER IP block
|
||||
* omap2_wd_timer_reset - reset and disable the WDTIMER IP block
|
||||
* @oh: struct omap_hwmod *
|
||||
*
|
||||
* After the WDTIMER IP blocks are reset on OMAP2/3, we must also take
|
||||
|
|
@ -71,6 +71,8 @@ int omap2_wd_timer_disable(struct omap_hwmod *oh)
|
|||
* during a normal merge window. omap_hwmod_softreset() should be
|
||||
* renamed to omap_hwmod_set_ocp_softreset(), and omap_hwmod_softreset()
|
||||
* should call the hwmod _ocp_softreset() code.
|
||||
*
|
||||
* Returns: %0 on success or -errno value on error.
|
||||
*/
|
||||
int omap2_wd_timer_reset(struct omap_hwmod *oh)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -76,6 +76,6 @@ extern void s3c24xx_init_uartdevs(char *name,
|
|||
struct s3c24xx_uart_resources *res,
|
||||
struct s3c2410_uartcfg *cfg, int no);
|
||||
|
||||
extern struct bus_type s3c6410_subsys;
|
||||
extern const struct bus_type s3c6410_subsys;
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -57,7 +57,7 @@ void __init s3c6410_init_irq(void)
|
|||
s3c64xx_init_irq(~0 & ~(1 << 7), ~0);
|
||||
}
|
||||
|
||||
struct bus_type s3c6410_subsys = {
|
||||
const struct bus_type s3c6410_subsys = {
|
||||
.name = "s3c6410-core",
|
||||
.dev_name = "s3c6410-core",
|
||||
};
|
||||
|
|
|
|||
|
|
@ -149,7 +149,7 @@ static struct map_desc s3c_iodesc[] __initdata = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct bus_type s3c64xx_subsys = {
|
||||
static const struct bus_type s3c64xx_subsys = {
|
||||
.name = "s3c64xx-core",
|
||||
.dev_name = "s3c64xx-core",
|
||||
};
|
||||
|
|
|
|||
|
|
@ -47,7 +47,7 @@ static void s3c_pm_do_save(struct sleep_save *ptr, int count)
|
|||
}
|
||||
|
||||
/**
|
||||
* s3c_pm_do_restore() - restore register values from the save list.
|
||||
* s3c_pm_do_restore_core() - restore register values from the save list.
|
||||
* @ptr: Pointer to an array of registers.
|
||||
* @count: Size of the ptr array.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -10,7 +10,6 @@
|
|||
#include <linux/mfd/syscon.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/regmap.h>
|
||||
#include <linux/clk/zynq.h>
|
||||
#include "common.h"
|
||||
|
||||
/* register offsets */
|
||||
|
|
@ -146,7 +145,7 @@ void zynq_slcr_cpu_stop(int cpu)
|
|||
}
|
||||
|
||||
/**
|
||||
* zynq_slcr_cpu_state - Read/write cpu state
|
||||
* zynq_slcr_cpu_state_read - Read cpu state
|
||||
* @cpu: cpu number
|
||||
*
|
||||
* SLCR_REBOOT_STATUS save upper 2 bits (31/30 cpu states for cpu0 and cpu1)
|
||||
|
|
@ -165,7 +164,7 @@ bool zynq_slcr_cpu_state_read(int cpu)
|
|||
}
|
||||
|
||||
/**
|
||||
* zynq_slcr_cpu_state - Read/write cpu state
|
||||
* zynq_slcr_cpu_state_write - Write cpu state
|
||||
* @cpu: cpu number
|
||||
* @die: cpu state - true if cpu is going to die
|
||||
*
|
||||
|
|
|
|||
Loading…
Reference in New Issue