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iommu/arm-smmu: fix calculation of TCR.T0SZ
T0SZ controls the input address range for TTBR0, so use the input address range rather than the output address range for the calculation. For stage-2, this means using the output size of stage-1. Signed-off-by: Will Deacon <will.deacon@arm.com>
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1 changed files with 3 additions and 1 deletions
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@ -800,6 +800,8 @@ static void arm_smmu_init_context_bank(struct arm_smmu_domain *smmu_domain)
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reg = TTBCR_TG0_64K;
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if (!stage1) {
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reg |= (64 - smmu->s1_output_size) << TTBCR_T0SZ_SHIFT;
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switch (smmu->s2_output_size) {
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case 32:
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reg |= (TTBCR2_ADDR_32 << TTBCR_PASIZE_SHIFT);
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@ -821,7 +823,7 @@ static void arm_smmu_init_context_bank(struct arm_smmu_domain *smmu_domain)
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break;
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}
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} else {
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reg |= (64 - smmu->s1_output_size) << TTBCR_T0SZ_SHIFT;
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reg |= (64 - smmu->input_size) << TTBCR_T0SZ_SHIFT;
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}
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} else {
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reg = 0;
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