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powerpc/ptrace: Enable support for Performance Monitor registers
This patch enables support for Performance monitor registers related ELF core note NT_PPC_PMU based ptrace requests through PTRACE_GETREGSET, PTRACE_SETREGSET calls. This is achieved through adding one new register sets REGSET_PMU in powerpc corresponding to the ELF core note sections added in this regard. It also implements the get, set and active functions for this new register sets added. Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com> Signed-off-by: Simon Guo <wei.guo.simon@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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2 changed files with 77 additions and 1 deletions
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@ -94,7 +94,8 @@
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#define ELF_NVMX 34 /* includes all vector registers */
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#define ELF_NVSX 32 /* includes all VSX registers */
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#define ELF_NTMSPRREG 3 /* include tfhar, tfiar, texasr */
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#define ELF_NEBB 3 /* includes ebbrr, ebbhr, bescr */
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#define ELF_NEBB 3 /* includes ebbrr, ebbhr, bescr */
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#define ELF_NPMU 5 /* includes siar, sdar, sier, mmcr2, mmcr0 */
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typedef unsigned long elf_greg_t64;
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typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
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@ -1824,6 +1824,75 @@ static int ebb_set(struct task_struct *target,
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return ret;
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}
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static int pmu_active(struct task_struct *target,
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const struct user_regset *regset)
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{
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if (!cpu_has_feature(CPU_FTR_ARCH_207S))
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return -ENODEV;
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return regset->n;
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}
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static int pmu_get(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
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/* Build tests */
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BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar));
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BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier));
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BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2));
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BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0));
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if (!cpu_has_feature(CPU_FTR_ARCH_207S))
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return -ENODEV;
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return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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&target->thread.siar, 0,
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5 * sizeof(unsigned long));
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}
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static int pmu_set(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf)
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{
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int ret = 0;
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/* Build tests */
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BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar));
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BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier));
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BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2));
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BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0));
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if (!cpu_has_feature(CPU_FTR_ARCH_207S))
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return -ENODEV;
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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&target->thread.siar, 0,
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sizeof(unsigned long));
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if (!ret)
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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&target->thread.sdar, sizeof(unsigned long),
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2 * sizeof(unsigned long));
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if (!ret)
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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&target->thread.sier, 2 * sizeof(unsigned long),
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3 * sizeof(unsigned long));
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if (!ret)
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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&target->thread.mmcr2, 3 * sizeof(unsigned long),
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4 * sizeof(unsigned long));
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if (!ret)
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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&target->thread.mmcr0, 4 * sizeof(unsigned long),
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5 * sizeof(unsigned long));
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return ret;
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}
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#endif
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/*
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* These are our native regset flavors.
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@ -1857,6 +1926,7 @@ enum powerpc_regset {
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#ifdef CONFIG_PPC_BOOK3S_64
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REGSET_TAR, /* TAR register */
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REGSET_EBB, /* EBB registers */
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REGSET_PMR, /* Performance Monitor Registers */
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#endif
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};
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@ -1957,6 +2027,11 @@ static const struct user_regset native_regsets[] = {
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.size = sizeof(u64), .align = sizeof(u64),
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.active = ebb_active, .get = ebb_get, .set = ebb_set
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},
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[REGSET_PMR] = {
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.core_note_type = NT_PPC_PMU, .n = ELF_NPMU,
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.size = sizeof(u64), .align = sizeof(u64),
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.active = pmu_active, .get = pmu_get, .set = pmu_set
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},
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#endif
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};
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