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drm/amd/powerplay: Add smc_sk firmware to baffin & ellesmere.

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update relational h files.

Signed-off-by: yanyang1 <Young.Yang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
yanyang1 2016-02-05 17:43:17 +08:00 committed by Alex Deucher
parent 735f002b14
commit a6ece7ffd9
3 changed files with 10 additions and 2 deletions
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1
drivers/gpu/drm/amd/amdgpu/smu_ucode_xfer_vi.h
View file

@ -44,6 +44,7 @@
#define UCODE_ID_IH_REG_RESTORE 11
#define UCODE_ID_VBIOS 12
#define UCODE_ID_MISC_METADATA 13
#define UCODE_ID_SMU_SK 14
#define UCODE_ID_RLC_SCRATCH 32
#define UCODE_ID_RLC_SRM_ARAM 33
#define UCODE_ID_RLC_SRM_DRAM 34

10
drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h
View file

@ -71,8 +71,12 @@ struct SMU_SclkSetting {
uint16_t Pcc_fcw_int;
uint8_t PllRange;
uint8_t SSc_En;
uint16_t Sclk_slew_rate;
uint16_t Pcc_up_slew_rate;
uint16_t Pcc_down_slew_rate;
uint16_t Fcw1_int;
uint16_t Fcw1_frac;
uint16_t Sclk_ss_slew_rate;
};
typedef struct SMU_SclkSetting SMU_SclkSetting;
@ -120,7 +124,8 @@ struct SMU74_Discrete_Ulv {
uint16_t VddcOffset;
uint8_t VddcOffsetVid;
uint8_t VddcPhase;
uint32_t Reserved;
uint16_t BifSclkDfs;
uint16_t Reserved;
};
typedef struct SMU74_Discrete_Ulv SMU74_Discrete_Ulv;
@ -155,7 +160,8 @@ struct SMU74_Discrete_LinkLevel {
uint8_t SPC;
uint32_t DownThreshold;
uint32_t UpThreshold;
uint32_t Reserved;
uint16_t BifSclkDfs;
uint16_t Reserved;
};
typedef struct SMU74_Discrete_LinkLevel SMU74_Discrete_LinkLevel;

1
drivers/gpu/drm/amd/powerplay/inc/smu_ucode_xfer_vi.h
View file

@ -44,6 +44,7 @@
#define UCODE_ID_IH_REG_RESTORE 11
#define UCODE_ID_VBIOS 12
#define UCODE_ID_MISC_METADATA 13
#define UCODE_ID_SMU_SK 14
#define UCODE_ID_RLC_SCRATCH 32
#define UCODE_ID_RLC_SRM_ARAM 33
#define UCODE_ID_RLC_SRM_DRAM 34