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arm64: dts: add clock support for all the cpus

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This patch adds the CPU clocks so that the CPU DVFS can be enabled.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Jon Medhurst (Tixy) <tixy@linaro.org>
This commit is contained in:
Sudeep Holla 2015-06-03 14:40:56 +01:00
parent 050c69e876
commit a738459888
2 changed files with 12 additions and 0 deletions
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6
arch/arm64/boot/dts/arm/juno-r1.dts
View file

@ -66,6 +66,7 @@ A57_0: cpu@0 {
device_type = "cpu";
enable-method = "psci";
next-level-cache = <&A57_L2>;
clocks = <&scpi_dvfs 0>;
};
A57_1: cpu@1 {
@ -74,6 +75,7 @@ A57_1: cpu@1 {
device_type = "cpu";
enable-method = "psci";
next-level-cache = <&A57_L2>;
clocks = <&scpi_dvfs 0>;
};
A53_0: cpu@100 {
@ -82,6 +84,7 @@ A53_0: cpu@100 {
device_type = "cpu";
enable-method = "psci";
next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>;
};
A53_1: cpu@101 {
@ -90,6 +93,7 @@ A53_1: cpu@101 {
device_type = "cpu";
enable-method = "psci";
next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>;
};
A53_2: cpu@102 {
@ -98,6 +102,7 @@ A53_2: cpu@102 {
device_type = "cpu";
enable-method = "psci";
next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>;
};
A53_3: cpu@103 {
@ -106,6 +111,7 @@ A53_3: cpu@103 {
device_type = "cpu";
enable-method = "psci";
next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>;
};
A57_L2: l2-cache0 {

6
arch/arm64/boot/dts/arm/juno.dts
View file

@ -66,6 +66,7 @@ A57_0: cpu@0 {
device_type = "cpu";
enable-method = "psci";
next-level-cache = <&A57_L2>;
clocks = <&scpi_dvfs 0>;
};
A57_1: cpu@1 {
@ -74,6 +75,7 @@ A57_1: cpu@1 {
device_type = "cpu";
enable-method = "psci";
next-level-cache = <&A57_L2>;
clocks = <&scpi_dvfs 0>;
};
A53_0: cpu@100 {
@ -82,6 +84,7 @@ A53_0: cpu@100 {
device_type = "cpu";
enable-method = "psci";
next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>;
};
A53_1: cpu@101 {
@ -90,6 +93,7 @@ A53_1: cpu@101 {
device_type = "cpu";
enable-method = "psci";
next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>;
};
A53_2: cpu@102 {
@ -98,6 +102,7 @@ A53_2: cpu@102 {
device_type = "cpu";
enable-method = "psci";
next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>;
};
A53_3: cpu@103 {
@ -106,6 +111,7 @@ A53_3: cpu@103 {
device_type = "cpu";
enable-method = "psci";
next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>;
};
A57_L2: l2-cache0 {