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s390/pci: CLP interface
CLP instructions are used to query the firmware about detected PCI functions, the attributes of those functions and to enable or disable a PCI function. The CLP interface is the equivalent to a PCI bus scan. Signed-off-by: Jan Glauber <jang@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
This commit is contained in:
parent
cd24834130
commit
a755a45dd9
6 changed files with 563 additions and 1 deletions
28
arch/s390/include/asm/clp.h
Normal file
28
arch/s390/include/asm/clp.h
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@ -0,0 +1,28 @@
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#ifndef _ASM_S390_CLP_H
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#define _ASM_S390_CLP_H
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/* CLP common request & response block size */
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#define CLP_BLK_SIZE (PAGE_SIZE * 2)
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struct clp_req_hdr {
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u16 len;
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u16 cmd;
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} __packed;
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struct clp_rsp_hdr {
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u16 len;
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u16 rsp;
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} __packed;
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/* CLP Response Codes */
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#define CLP_RC_OK 0x0010 /* Command request successfully */
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#define CLP_RC_CMD 0x0020 /* Command code not recognized */
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#define CLP_RC_PERM 0x0030 /* Command not authorized */
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#define CLP_RC_FMT 0x0040 /* Invalid command request format */
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#define CLP_RC_LEN 0x0050 /* Invalid command request length */
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#define CLP_RC_8K 0x0060 /* Command requires 8K LPCB */
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#define CLP_RC_RESNOT0 0x0070 /* Reserved field not zero */
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#define CLP_RC_NODATA 0x0080 /* No data available */
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#define CLP_RC_FC_UNKNOWN 0x0100 /* Function code not recognized */
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#endif
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@ -8,6 +8,7 @@
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#include <asm-generic/pci.h>
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#include <asm-generic/pci-dma-compat.h>
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#include <asm/pci_clp.h>
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#define PCIBIOS_MIN_IO 0x1000
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#define PCIBIOS_MIN_MEM 0x10000000
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@ -76,6 +77,12 @@ void zpci_stop_device(struct zpci_dev *);
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void zpci_free_device(struct zpci_dev *);
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int zpci_scan_device(struct zpci_dev *);
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/* CLP */
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int clp_find_pci_devices(void);
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int clp_add_pci_device(u32, u32, int);
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int clp_enable_fh(struct zpci_dev *, u8);
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int clp_disable_fh(struct zpci_dev *);
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/* Helpers */
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struct zpci_dev *get_zdev(struct pci_dev *);
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struct zpci_dev *get_zdev_by_fid(u32);
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182
arch/s390/include/asm/pci_clp.h
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182
arch/s390/include/asm/pci_clp.h
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@ -0,0 +1,182 @@
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#ifndef _ASM_S390_PCI_CLP_H
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#define _ASM_S390_PCI_CLP_H
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#include <asm/clp.h>
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/*
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* Call Logical Processor - Command Codes
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*/
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#define CLP_LIST_PCI 0x0002
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#define CLP_QUERY_PCI_FN 0x0003
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#define CLP_QUERY_PCI_FNGRP 0x0004
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#define CLP_SET_PCI_FN 0x0005
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/* PCI function handle list entry */
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struct clp_fh_list_entry {
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u16 device_id;
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u16 vendor_id;
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u32 config_state : 1;
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u32 : 31;
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u32 fid; /* PCI function id */
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u32 fh; /* PCI function handle */
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} __packed;
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#define CLP_RC_SETPCIFN_FH 0x0101 /* Invalid PCI fn handle */
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#define CLP_RC_SETPCIFN_FHOP 0x0102 /* Fn handle not valid for op */
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#define CLP_RC_SETPCIFN_DMAAS 0x0103 /* Invalid DMA addr space */
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#define CLP_RC_SETPCIFN_RES 0x0104 /* Insufficient resources */
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#define CLP_RC_SETPCIFN_ALRDY 0x0105 /* Fn already in requested state */
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#define CLP_RC_SETPCIFN_ERR 0x0106 /* Fn in permanent error state */
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#define CLP_RC_SETPCIFN_RECPND 0x0107 /* Error recovery pending */
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#define CLP_RC_SETPCIFN_BUSY 0x0108 /* Fn busy */
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#define CLP_RC_LISTPCI_BADRT 0x010a /* Resume token not recognized */
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#define CLP_RC_QUERYPCIFG_PFGID 0x010b /* Unrecognized PFGID */
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/* request or response block header length */
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#define LIST_PCI_HDR_LEN 32
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/* Number of function handles fitting in response block */
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#define CLP_FH_LIST_NR_ENTRIES \
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((CLP_BLK_SIZE - 2 * LIST_PCI_HDR_LEN) \
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/ sizeof(struct clp_fh_list_entry))
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#define CLP_SET_ENABLE_PCI_FN 0 /* Yes, 0 enables it */
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#define CLP_SET_DISABLE_PCI_FN 1 /* Yes, 1 disables it */
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#define CLP_UTIL_STR_LEN 64
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/* List PCI functions request */
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struct clp_req_list_pci {
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struct clp_req_hdr hdr;
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u32 fmt : 4; /* cmd request block format */
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u32 : 28;
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u64 reserved1;
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u64 resume_token;
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u64 reserved2;
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} __packed;
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/* List PCI functions response */
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struct clp_rsp_list_pci {
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struct clp_rsp_hdr hdr;
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u32 fmt : 4; /* cmd request block format */
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u32 : 28;
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u64 reserved1;
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u64 resume_token;
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u32 reserved2;
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u16 max_fn;
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u8 reserved3;
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u8 entry_size;
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struct clp_fh_list_entry fh_list[CLP_FH_LIST_NR_ENTRIES];
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} __packed;
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/* Query PCI function request */
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struct clp_req_query_pci {
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struct clp_req_hdr hdr;
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u32 fmt : 4; /* cmd request block format */
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u32 : 28;
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u64 reserved1;
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u32 fh; /* function handle */
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u32 reserved2;
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u64 reserved3;
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} __packed;
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/* Query PCI function response */
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struct clp_rsp_query_pci {
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struct clp_rsp_hdr hdr;
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u32 fmt : 4; /* cmd request block format */
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u32 : 28;
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u64 reserved1;
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u16 vfn; /* virtual fn number */
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u16 : 7;
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u16 util_str_avail : 1; /* utility string available? */
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u16 pfgid : 8; /* pci function group id */
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u32 fid; /* pci function id */
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u8 bar_size[PCI_BAR_COUNT];
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u16 pchid;
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u32 bar[PCI_BAR_COUNT];
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u64 reserved2;
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u64 sdma; /* start dma as */
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u64 edma; /* end dma as */
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u64 reserved3[6];
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u8 util_str[CLP_UTIL_STR_LEN]; /* utility string */
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} __packed;
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/* Query PCI function group request */
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struct clp_req_query_pci_grp {
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struct clp_req_hdr hdr;
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u32 fmt : 4; /* cmd request block format */
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u32 : 28;
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u64 reserved1;
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u32 : 24;
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u32 pfgid : 8; /* function group id */
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u32 reserved2;
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u64 reserved3;
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} __packed;
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/* Query PCI function group response */
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struct clp_rsp_query_pci_grp {
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struct clp_rsp_hdr hdr;
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u32 fmt : 4; /* cmd request block format */
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u32 : 28;
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u64 reserved1;
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u16 : 4;
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u16 noi : 12; /* number of interrupts */
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u8 version;
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u8 : 6;
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u8 frame : 1;
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u8 refresh : 1; /* TLB refresh mode */
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u16 reserved2;
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u16 mui;
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u64 reserved3;
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u64 dasm; /* dma address space mask */
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u64 msia; /* MSI address */
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u64 reserved4;
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u64 reserved5;
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} __packed;
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/* Set PCI function request */
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struct clp_req_set_pci {
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struct clp_req_hdr hdr;
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u32 fmt : 4; /* cmd request block format */
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u32 : 28;
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u64 reserved1;
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u32 fh; /* function handle */
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u16 reserved2;
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u8 oc; /* operation controls */
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u8 ndas; /* number of dma spaces */
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u64 reserved3;
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} __packed;
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/* Set PCI function response */
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struct clp_rsp_set_pci {
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struct clp_rsp_hdr hdr;
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u32 fmt : 4; /* cmd request block format */
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u32 : 28;
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u64 reserved1;
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u32 fh; /* function handle */
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u32 reserved3;
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u64 reserved4;
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} __packed;
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/* Combined request/response block structures used by clp insn */
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struct clp_req_rsp_list_pci {
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struct clp_req_list_pci request;
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struct clp_rsp_list_pci response;
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} __packed;
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struct clp_req_rsp_set_pci {
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struct clp_req_set_pci request;
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struct clp_rsp_set_pci response;
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} __packed;
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struct clp_req_rsp_query_pci {
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struct clp_req_query_pci request;
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struct clp_rsp_query_pci response;
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} __packed;
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struct clp_req_rsp_query_pci_grp {
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struct clp_req_query_pci_grp request;
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struct clp_rsp_query_pci_grp response;
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} __packed;
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#endif
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# Makefile for the s390 PCI subsystem.
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#
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obj-$(CONFIG_PCI) += pci.o
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obj-$(CONFIG_PCI) += pci.o pci_clp.o
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#include <asm/facility.h>
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#include <asm/pci_insn.h>
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#include <asm/pci_clp.h>
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#define DEBUG /* enable pr_debug */
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@ -436,6 +437,20 @@ static void zpci_free_domain(struct zpci_dev *zdev)
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spin_unlock(&zpci_domain_lock);
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}
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int zpci_enable_device(struct zpci_dev *zdev)
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{
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int rc;
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rc = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
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if (rc)
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goto out;
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pr_info("Enabled fh: 0x%x fid: 0x%x\n", zdev->fh, zdev->fid);
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return 0;
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out:
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return rc;
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}
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EXPORT_SYMBOL_GPL(zpci_enable_device);
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int zpci_create_device(struct zpci_dev *zdev)
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{
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int rc;
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if (zdev->state == ZPCI_FN_STATE_STANDBY)
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return 0;
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rc = zpci_enable_device(zdev);
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if (rc)
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goto out_start;
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return 0;
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out_start:
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mutex_lock(&zpci_list_lock);
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list_del(&zdev->entry);
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mutex_unlock(&zpci_list_lock);
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out_bus:
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zpci_free_domain(zdev);
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out:
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@ -489,6 +511,7 @@ int zpci_scan_device(struct zpci_dev *zdev)
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return 0;
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out:
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clp_disable_fh(zdev);
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return -EIO;
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}
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EXPORT_SYMBOL_GPL(zpci_scan_device);
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@ -547,9 +570,14 @@ static int __init pci_base_init(void)
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if (rc)
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goto out_mem;
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rc = clp_find_pci_devices();
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if (rc)
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goto out_find;
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zpci_scan_devices();
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return 0;
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out_find:
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zpci_mem_exit();
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out_mem:
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return rc;
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317
arch/s390/pci/pci_clp.c
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317
arch/s390/pci/pci_clp.c
Normal file
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/*
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* Copyright IBM Corp. 2012
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*
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* Author(s):
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* Jan Glauber <jang@linux.vnet.ibm.com>
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*/
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#define COMPONENT "zPCI"
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#define pr_fmt(fmt) COMPONENT ": " fmt
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/delay.h>
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#include <linux/pci.h>
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#include <asm/pci_clp.h>
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/*
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* Call Logical Processor
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* Retry logic is handled by the caller.
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*/
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static inline u8 clp_instr(void *req)
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{
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u64 ilpm;
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u8 cc;
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asm volatile (
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" .insn rrf,0xb9a00000,%[ilpm],%[req],0x0,0x2\n"
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" ipm %[cc]\n"
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" srl %[cc],28\n"
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: [cc] "=d" (cc), [ilpm] "=d" (ilpm)
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: [req] "a" (req)
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: "cc", "memory");
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return cc;
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}
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static void *clp_alloc_block(void)
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{
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struct page *page = alloc_pages(GFP_KERNEL, get_order(CLP_BLK_SIZE));
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return (page) ? page_address(page) : NULL;
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}
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static void clp_free_block(void *ptr)
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{
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free_pages((unsigned long) ptr, get_order(CLP_BLK_SIZE));
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}
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static void clp_store_query_pci_fngrp(struct zpci_dev *zdev,
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struct clp_rsp_query_pci_grp *response)
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{
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switch (response->version) {
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case 1:
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zdev->max_bus_speed = PCIE_SPEED_5_0GT;
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break;
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default:
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zdev->max_bus_speed = PCI_SPEED_UNKNOWN;
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break;
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}
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}
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static int clp_query_pci_fngrp(struct zpci_dev *zdev, u8 pfgid)
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{
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struct clp_req_rsp_query_pci_grp *rrb;
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int rc;
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rrb = clp_alloc_block();
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if (!rrb)
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return -ENOMEM;
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memset(rrb, 0, sizeof(*rrb));
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rrb->request.hdr.len = sizeof(rrb->request);
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rrb->request.hdr.cmd = CLP_QUERY_PCI_FNGRP;
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rrb->response.hdr.len = sizeof(rrb->response);
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rrb->request.pfgid = pfgid;
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rc = clp_instr(rrb);
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if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)
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clp_store_query_pci_fngrp(zdev, &rrb->response);
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else {
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pr_err("Query PCI FNGRP failed with response: %x cc: %d\n",
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rrb->response.hdr.rsp, rc);
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rc = -EIO;
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}
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clp_free_block(rrb);
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return rc;
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}
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static int clp_store_query_pci_fn(struct zpci_dev *zdev,
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struct clp_rsp_query_pci *response)
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{
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int i;
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for (i = 0; i < PCI_BAR_COUNT; i++) {
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zdev->bars[i].val = le32_to_cpu(response->bar[i]);
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zdev->bars[i].size = response->bar_size[i];
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}
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zdev->pchid = response->pchid;
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zdev->pfgid = response->pfgid;
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return 0;
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}
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static int clp_query_pci_fn(struct zpci_dev *zdev, u32 fh)
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{
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struct clp_req_rsp_query_pci *rrb;
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int rc;
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rrb = clp_alloc_block();
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if (!rrb)
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return -ENOMEM;
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memset(rrb, 0, sizeof(*rrb));
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rrb->request.hdr.len = sizeof(rrb->request);
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rrb->request.hdr.cmd = CLP_QUERY_PCI_FN;
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rrb->response.hdr.len = sizeof(rrb->response);
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rrb->request.fh = fh;
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rc = clp_instr(rrb);
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if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
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rc = clp_store_query_pci_fn(zdev, &rrb->response);
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if (rc)
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goto out;
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if (rrb->response.pfgid)
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rc = clp_query_pci_fngrp(zdev, rrb->response.pfgid);
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} else {
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pr_err("Query PCI failed with response: %x cc: %d\n",
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rrb->response.hdr.rsp, rc);
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rc = -EIO;
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}
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out:
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clp_free_block(rrb);
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return rc;
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}
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int clp_add_pci_device(u32 fid, u32 fh, int configured)
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{
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struct zpci_dev *zdev;
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int rc;
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zdev = zpci_alloc_device();
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if (IS_ERR(zdev))
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return PTR_ERR(zdev);
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zdev->fh = fh;
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zdev->fid = fid;
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/* Query function properties and update zdev */
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rc = clp_query_pci_fn(zdev, fh);
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if (rc)
|
||||
goto error;
|
||||
|
||||
if (configured)
|
||||
zdev->state = ZPCI_FN_STATE_CONFIGURED;
|
||||
else
|
||||
zdev->state = ZPCI_FN_STATE_STANDBY;
|
||||
|
||||
rc = zpci_create_device(zdev);
|
||||
if (rc)
|
||||
goto error;
|
||||
return 0;
|
||||
|
||||
error:
|
||||
zpci_free_device(zdev);
|
||||
return rc;
|
||||
}
|
||||
|
||||
/*
|
||||
* Enable/Disable a given PCI function defined by its function handle.
|
||||
*/
|
||||
static int clp_set_pci_fn(u32 *fh, u8 nr_dma_as, u8 command)
|
||||
{
|
||||
struct clp_req_rsp_set_pci *rrb;
|
||||
int rc, retries = 1000;
|
||||
|
||||
rrb = clp_alloc_block();
|
||||
if (!rrb)
|
||||
return -ENOMEM;
|
||||
|
||||
do {
|
||||
memset(rrb, 0, sizeof(*rrb));
|
||||
rrb->request.hdr.len = sizeof(rrb->request);
|
||||
rrb->request.hdr.cmd = CLP_SET_PCI_FN;
|
||||
rrb->response.hdr.len = sizeof(rrb->response);
|
||||
rrb->request.fh = *fh;
|
||||
rrb->request.oc = command;
|
||||
rrb->request.ndas = nr_dma_as;
|
||||
|
||||
rc = clp_instr(rrb);
|
||||
if (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY) {
|
||||
retries--;
|
||||
if (retries < 0)
|
||||
break;
|
||||
msleep(1);
|
||||
}
|
||||
} while (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY);
|
||||
|
||||
if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)
|
||||
*fh = rrb->response.fh;
|
||||
else {
|
||||
pr_err("Set PCI FN failed with response: %x cc: %d\n",
|
||||
rrb->response.hdr.rsp, rc);
|
||||
rc = -EIO;
|
||||
}
|
||||
clp_free_block(rrb);
|
||||
return rc;
|
||||
}
|
||||
|
||||
int clp_enable_fh(struct zpci_dev *zdev, u8 nr_dma_as)
|
||||
{
|
||||
u32 fh = zdev->fh;
|
||||
int rc;
|
||||
|
||||
rc = clp_set_pci_fn(&fh, nr_dma_as, CLP_SET_ENABLE_PCI_FN);
|
||||
if (!rc)
|
||||
/* Success -> store enabled handle in zdev */
|
||||
zdev->fh = fh;
|
||||
return rc;
|
||||
}
|
||||
|
||||
int clp_disable_fh(struct zpci_dev *zdev)
|
||||
{
|
||||
u32 fh = zdev->fh;
|
||||
int rc;
|
||||
|
||||
if (!zdev_enabled(zdev))
|
||||
return 0;
|
||||
|
||||
dev_info(&zdev->pdev->dev, "disabling fn handle: 0x%x\n", fh);
|
||||
rc = clp_set_pci_fn(&fh, 0, CLP_SET_DISABLE_PCI_FN);
|
||||
if (!rc)
|
||||
/* Success -> store disabled handle in zdev */
|
||||
zdev->fh = fh;
|
||||
else
|
||||
dev_err(&zdev->pdev->dev,
|
||||
"Failed to disable fn handle: 0x%x\n", fh);
|
||||
return rc;
|
||||
}
|
||||
|
||||
static void clp_check_pcifn_entry(struct clp_fh_list_entry *entry)
|
||||
{
|
||||
int present, rc;
|
||||
|
||||
if (!entry->vendor_id)
|
||||
return;
|
||||
|
||||
/* TODO: be a little bit more scalable */
|
||||
present = zpci_fid_present(entry->fid);
|
||||
|
||||
if (present)
|
||||
pr_debug("%s: device %x already present\n", __func__, entry->fid);
|
||||
|
||||
/* skip already used functions */
|
||||
if (present && entry->config_state)
|
||||
return;
|
||||
|
||||
/* aev 306: function moved to stand-by state */
|
||||
if (present && !entry->config_state) {
|
||||
/*
|
||||
* The handle is already disabled, that means no iota/irq freeing via
|
||||
* the firmware interfaces anymore. Need to free resources manually
|
||||
* (DMA memory, debug, sysfs)...
|
||||
*/
|
||||
zpci_stop_device(get_zdev_by_fid(entry->fid));
|
||||
return;
|
||||
}
|
||||
|
||||
rc = clp_add_pci_device(entry->fid, entry->fh, entry->config_state);
|
||||
if (rc)
|
||||
pr_err("Failed to add fid: 0x%x\n", entry->fid);
|
||||
}
|
||||
|
||||
int clp_find_pci_devices(void)
|
||||
{
|
||||
struct clp_req_rsp_list_pci *rrb;
|
||||
u64 resume_token = 0;
|
||||
int entries, i, rc;
|
||||
|
||||
rrb = clp_alloc_block();
|
||||
if (!rrb)
|
||||
return -ENOMEM;
|
||||
|
||||
do {
|
||||
memset(rrb, 0, sizeof(*rrb));
|
||||
rrb->request.hdr.len = sizeof(rrb->request);
|
||||
rrb->request.hdr.cmd = CLP_LIST_PCI;
|
||||
/* store as many entries as possible */
|
||||
rrb->response.hdr.len = CLP_BLK_SIZE - LIST_PCI_HDR_LEN;
|
||||
rrb->request.resume_token = resume_token;
|
||||
|
||||
/* Get PCI function handle list */
|
||||
rc = clp_instr(rrb);
|
||||
if (rc || rrb->response.hdr.rsp != CLP_RC_OK) {
|
||||
pr_err("List PCI failed with response: 0x%x cc: %d\n",
|
||||
rrb->response.hdr.rsp, rc);
|
||||
rc = -EIO;
|
||||
goto out;
|
||||
}
|
||||
|
||||
WARN_ON_ONCE(rrb->response.entry_size !=
|
||||
sizeof(struct clp_fh_list_entry));
|
||||
|
||||
entries = (rrb->response.hdr.len - LIST_PCI_HDR_LEN) /
|
||||
rrb->response.entry_size;
|
||||
pr_info("Detected number of PCI functions: %u\n", entries);
|
||||
|
||||
/* Store the returned resume token as input for the next call */
|
||||
resume_token = rrb->response.resume_token;
|
||||
|
||||
for (i = 0; i < entries; i++)
|
||||
clp_check_pcifn_entry(&rrb->response.fh_list[i]);
|
||||
} while (resume_token);
|
||||
|
||||
pr_debug("Maximum number of supported PCI functions: %u\n",
|
||||
rrb->response.max_fn);
|
||||
out:
|
||||
clp_free_block(rrb);
|
||||
return rc;
|
||||
}
|
Loading…
Reference in a new issue