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dt-bindings: clock: Add YAML schemas for CAMCC clocks on SC7280
The camera clock controller clock provider have a bunch of generic properties that are needed in a device tree. Add the CAMCC clock IDs for camera client to request for the clocks. Signed-off-by: Taniya Das <tdas@codeaurora.org> Link: https://lore.kernel.org/r/1633567425-11953-1-git-send-email-tdas@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Taniya Das
Stephen Boyd
parent
4ab43d1711
commit
a764e1ed50
2 changed files with 198 additions and 0 deletions
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,sc7280-camcc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Camera Clock & Reset Controller Binding for SC7280
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maintainers:
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- Taniya Das <tdas@codeaurora.org>
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description: |
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Qualcomm camera clock control module which supports the clocks, resets and
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power domains on SC7280.
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See also dt-bindings/clock/qcom,camcc-sc7280.h
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properties:
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compatible:
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const: qcom,sc7280-camcc
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clocks:
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items:
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- description: Board XO source
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- description: Board XO active source
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- description: Sleep clock source
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clock-names:
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items:
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- const: bi_tcxo
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- const: bi_tcxo_ao
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- const: sleep_clk
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'#clock-cells':
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const: 1
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'#reset-cells':
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const: 1
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'#power-domain-cells':
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const: 1
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reg:
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maxItems: 1
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- '#clock-cells'
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- '#reset-cells'
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- '#power-domain-cells'
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,rpmh.h>
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clock-controller@ad00000 {
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compatible = "qcom,sc7280-camcc";
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reg = <0x0ad00000 0x10000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>,
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<&rpmhcc RPMH_CXO_CLK_A>,
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<&sleep_clk>;
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clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk";
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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};
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...
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127
include/dt-bindings/clock/qcom,camcc-sc7280.h
Normal file
127
include/dt-bindings/clock/qcom,camcc-sc7280.h
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@ -0,0 +1,127 @@
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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) 2021, The Linux Foundation. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_CAM_CC_SC7280_H
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#define _DT_BINDINGS_CLK_QCOM_CAM_CC_SC7280_H
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/* CAM_CC clocks */
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#define CAM_CC_PLL0 0
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#define CAM_CC_PLL0_OUT_EVEN 1
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#define CAM_CC_PLL0_OUT_ODD 2
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#define CAM_CC_PLL1 3
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#define CAM_CC_PLL1_OUT_EVEN 4
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#define CAM_CC_PLL2 5
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#define CAM_CC_PLL2_OUT_AUX 6
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#define CAM_CC_PLL2_OUT_AUX2 7
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#define CAM_CC_PLL3 8
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#define CAM_CC_PLL3_OUT_EVEN 9
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#define CAM_CC_PLL4 10
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#define CAM_CC_PLL4_OUT_EVEN 11
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#define CAM_CC_PLL5 12
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#define CAM_CC_PLL5_OUT_EVEN 13
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#define CAM_CC_PLL6 14
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#define CAM_CC_PLL6_OUT_EVEN 15
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#define CAM_CC_PLL6_OUT_ODD 16
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#define CAM_CC_BPS_AHB_CLK 17
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#define CAM_CC_BPS_AREG_CLK 18
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#define CAM_CC_BPS_AXI_CLK 19
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#define CAM_CC_BPS_CLK 20
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#define CAM_CC_BPS_CLK_SRC 21
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#define CAM_CC_CAMNOC_AXI_CLK 22
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#define CAM_CC_CAMNOC_AXI_CLK_SRC 23
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#define CAM_CC_CAMNOC_DCD_XO_CLK 24
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#define CAM_CC_CCI_0_CLK 25
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#define CAM_CC_CCI_0_CLK_SRC 26
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#define CAM_CC_CCI_1_CLK 27
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#define CAM_CC_CCI_1_CLK_SRC 28
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#define CAM_CC_CORE_AHB_CLK 29
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#define CAM_CC_CPAS_AHB_CLK 30
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#define CAM_CC_CPHY_RX_CLK_SRC 31
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#define CAM_CC_CSI0PHYTIMER_CLK 32
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#define CAM_CC_CSI0PHYTIMER_CLK_SRC 33
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#define CAM_CC_CSI1PHYTIMER_CLK 34
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#define CAM_CC_CSI1PHYTIMER_CLK_SRC 35
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#define CAM_CC_CSI2PHYTIMER_CLK 36
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#define CAM_CC_CSI2PHYTIMER_CLK_SRC 37
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#define CAM_CC_CSI3PHYTIMER_CLK 38
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#define CAM_CC_CSI3PHYTIMER_CLK_SRC 39
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#define CAM_CC_CSI4PHYTIMER_CLK 40
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#define CAM_CC_CSI4PHYTIMER_CLK_SRC 41
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#define CAM_CC_CSIPHY0_CLK 42
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#define CAM_CC_CSIPHY1_CLK 43
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#define CAM_CC_CSIPHY2_CLK 44
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#define CAM_CC_CSIPHY3_CLK 45
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#define CAM_CC_CSIPHY4_CLK 46
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#define CAM_CC_FAST_AHB_CLK_SRC 47
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#define CAM_CC_GDSC_CLK 48
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#define CAM_CC_ICP_AHB_CLK 49
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#define CAM_CC_ICP_CLK 50
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#define CAM_CC_ICP_CLK_SRC 51
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#define CAM_CC_IFE_0_AXI_CLK 52
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#define CAM_CC_IFE_0_CLK 53
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#define CAM_CC_IFE_0_CLK_SRC 54
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#define CAM_CC_IFE_0_CPHY_RX_CLK 55
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#define CAM_CC_IFE_0_CSID_CLK 56
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#define CAM_CC_IFE_0_CSID_CLK_SRC 57
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#define CAM_CC_IFE_0_DSP_CLK 58
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#define CAM_CC_IFE_1_AXI_CLK 59
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#define CAM_CC_IFE_1_CLK 60
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#define CAM_CC_IFE_1_CLK_SRC 61
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#define CAM_CC_IFE_1_CPHY_RX_CLK 62
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#define CAM_CC_IFE_1_CSID_CLK 63
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#define CAM_CC_IFE_1_CSID_CLK_SRC 64
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#define CAM_CC_IFE_1_DSP_CLK 65
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#define CAM_CC_IFE_2_AXI_CLK 66
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#define CAM_CC_IFE_2_CLK 67
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#define CAM_CC_IFE_2_CLK_SRC 68
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#define CAM_CC_IFE_2_CPHY_RX_CLK 69
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#define CAM_CC_IFE_2_CSID_CLK 70
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#define CAM_CC_IFE_2_CSID_CLK_SRC 71
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#define CAM_CC_IFE_2_DSP_CLK 72
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#define CAM_CC_IFE_LITE_0_CLK 73
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#define CAM_CC_IFE_LITE_0_CLK_SRC 74
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#define CAM_CC_IFE_LITE_0_CPHY_RX_CLK 75
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#define CAM_CC_IFE_LITE_0_CSID_CLK 76
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#define CAM_CC_IFE_LITE_0_CSID_CLK_SRC 77
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#define CAM_CC_IFE_LITE_1_CLK 78
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#define CAM_CC_IFE_LITE_1_CLK_SRC 79
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#define CAM_CC_IFE_LITE_1_CPHY_RX_CLK 80
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#define CAM_CC_IFE_LITE_1_CSID_CLK 81
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#define CAM_CC_IFE_LITE_1_CSID_CLK_SRC 82
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#define CAM_CC_IPE_0_AHB_CLK 83
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#define CAM_CC_IPE_0_AREG_CLK 84
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#define CAM_CC_IPE_0_AXI_CLK 85
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#define CAM_CC_IPE_0_CLK 86
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#define CAM_CC_IPE_0_CLK_SRC 87
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#define CAM_CC_JPEG_CLK 88
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#define CAM_CC_JPEG_CLK_SRC 89
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#define CAM_CC_LRME_CLK 90
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#define CAM_CC_LRME_CLK_SRC 91
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#define CAM_CC_MCLK0_CLK 92
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#define CAM_CC_MCLK0_CLK_SRC 93
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#define CAM_CC_MCLK1_CLK 94
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#define CAM_CC_MCLK1_CLK_SRC 95
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#define CAM_CC_MCLK2_CLK 96
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#define CAM_CC_MCLK2_CLK_SRC 97
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#define CAM_CC_MCLK3_CLK 98
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#define CAM_CC_MCLK3_CLK_SRC 99
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#define CAM_CC_MCLK4_CLK 100
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#define CAM_CC_MCLK4_CLK_SRC 101
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#define CAM_CC_MCLK5_CLK 102
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#define CAM_CC_MCLK5_CLK_SRC 103
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#define CAM_CC_SLEEP_CLK 104
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#define CAM_CC_SLEEP_CLK_SRC 105
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#define CAM_CC_SLOW_AHB_CLK_SRC 106
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#define CAM_CC_XO_CLK_SRC 107
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/* CAM_CC power domains */
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#define CAM_CC_BPS_GDSC 0
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#define CAM_CC_IFE_0_GDSC 1
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#define CAM_CC_IFE_1_GDSC 2
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#define CAM_CC_IFE_2_GDSC 3
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#define CAM_CC_IPE_0_GDSC 4
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#define CAM_CC_TITAN_TOP_GDSC 5
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#endif
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