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drm/i915: kerneldoc for fences
v2: Clarify that this is about fence _registers_. Also clarify that the fence code revokes cpu ptes and not gtt ptes. Both suggested by Chris. Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
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@ -4197,6 +4197,11 @@ int num_ioctls;</synopsis>
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<title>Global GTT views</title>
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!Pdrivers/gpu/drm/i915/i915_gem_gtt.c Global GTT views
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!Idrivers/gpu/drm/i915/i915_gem_gtt.c
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</sect2>
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<sect2>
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<title>Global GTT Fence Handling</title>
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!Pdrivers/gpu/drm/i915/i915_gem_fence.c fence register handling
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!Idrivers/gpu/drm/i915/i915_gem_fence.c
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</sect2>
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<sect2>
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<title>Buffer Object Eviction</title>
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@ -25,6 +25,36 @@
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#include <drm/i915_drm.h>
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#include "i915_drv.h"
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/**
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* DOC: fence register handling
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*
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* Important to avoid confusions: "fences" in the i915 driver are not execution
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* fences used to track command completion but hardware detiler objects which
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* wrap a given range of the global GTT. Each platform has only a fairly limited
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* set of these objects.
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*
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* Fences are used to detile GTT memory mappings. They're also connected to the
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* hardware frontbuffer render tracking and hence interract with frontbuffer
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* conmpression. Furthermore on older platforms fences are required for tiled
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* objects used by the display engine. They can also be used by the render
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* engine - they're required for blitter commands and are optional for render
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* commands. But on gen4+ both display (with the exception of fbc) and rendering
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* have their own tiling state bits and don't need fences.
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*
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* Also note that fences only support X and Y tiling and hence can't be used for
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* the fancier new tiling formats like W, Ys and Yf.
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*
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* Finally note that because fences are such a restricted resource they're
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* dynamically associated with objects. Furthermore fence state is committed to
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* the hardware lazily to avoid unecessary stalls on gen2/3. Therefore code must
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* explictly call i915_gem_object_get_fence() to synchronize fencing status
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* for cpu access. Also note that some code wants an unfenced view, for those
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* cases the fence can be removed forcefully with i915_gem_object_put_fence().
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*
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* Internally these functions will synchronize with userspace access by removing
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* CPU ptes into GTT mmaps (not the GTT ptes themselves) as needed.
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*/
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static void i965_write_fence_reg(struct drm_device *dev, int reg,
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struct drm_i915_gem_object *obj)
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{
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@ -247,6 +277,17 @@ i915_gem_object_wait_fence(struct drm_i915_gem_object *obj)
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return 0;
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}
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/**
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* i915_gem_object_put_fence - force-remove fence for an object
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* @obj: object to map through a fence reg
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*
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* This function force-removes any fence from the given object, which is useful
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* if the kernel wants to do untiled GTT access.
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*
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* Returns:
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*
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* 0 on success, negative error code on failure.
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*/
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int
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i915_gem_object_put_fence(struct drm_i915_gem_object *obj)
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{
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@ -322,6 +363,10 @@ i915_find_fence_reg(struct drm_device *dev)
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* and tiling format.
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*
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* For an untiled surface, this removes any existing fence.
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*
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* Returns:
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*
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* 0 on success, negative error code on failure.
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*/
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int
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i915_gem_object_get_fence(struct drm_i915_gem_object *obj)
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@ -374,6 +419,21 @@ i915_gem_object_get_fence(struct drm_i915_gem_object *obj)
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return 0;
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}
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/**
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* i915_gem_object_pin_fence - pin fencing state
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* @obj: object to pin fencing for
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*
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* This pins the fencing state (whether tiled or untiled) to make sure the
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* object is ready to be used as a scanout target. Fencing status must be
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* synchronize first by calling i915_gem_object_get_fence():
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*
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* The resulting fence pin reference must be released again with
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* i915_gem_object_unpin_fence().
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*
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* Returns:
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*
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* True if the object has a fence, false otherwise.
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*/
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bool
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i915_gem_object_pin_fence(struct drm_i915_gem_object *obj)
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{
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@ -390,6 +450,14 @@ i915_gem_object_pin_fence(struct drm_i915_gem_object *obj)
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return false;
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}
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/**
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* i915_gem_object_unpin_fence - unpin fencing state
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* @obj: object to unpin fencing for
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*
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* This releases the fence pin reference acquired through
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* i915_gem_object_pin_fence. It will handle both objects with and without an
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* attached fence correctly, callers do not need to distinguish this.
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*/
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void
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i915_gem_object_unpin_fence(struct drm_i915_gem_object *obj)
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{
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@ -400,6 +468,13 @@ i915_gem_object_unpin_fence(struct drm_i915_gem_object *obj)
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}
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}
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/**
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* i915_gem_restore_fences - restore fence state
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* @dev: DRM device
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*
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* Restore the hw fence state to match the software tracking again, to be called
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* after a gpu reset and on resume.
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*/
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void i915_gem_restore_fences(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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