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drm/amdgpu/gmc: switch to amdgpu_gmc_ras_late_init helper function
amdgpu_gmc_ras_late_init is used to init gmc specfic ras debugfs/sysfs node and gmc specific interrupt handler. It can be shared among gmc generations. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
d094aea312
commit
a85eff14da
3 changed files with 53 additions and 34 deletions
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@ -27,6 +27,7 @@
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#include <linux/io-64-nonatomic-lo-hi.h>
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#include "amdgpu.h"
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#include "amdgpu_ras.h"
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/**
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* amdgpu_gmc_get_pde_for_bo - get the PDE for a BO
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@ -305,3 +306,51 @@ bool amdgpu_gmc_filter_faults(struct amdgpu_device *adev, uint64_t addr,
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gmc->fault_hash[hash].idx = gmc->last_fault++;
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return false;
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}
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int amdgpu_gmc_ras_late_init(struct amdgpu_device *adev,
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void *ras_ih_info)
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{
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int r;
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struct ras_ih_if *ih_info = (struct ras_ih_if *)ras_ih_info;
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struct ras_fs_if fs_info = {
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.sysfs_name = "umc_err_count",
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.debugfs_name = "umc_err_inject",
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};
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if (!ih_info)
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return -EINVAL;
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if (!adev->gmc.umc_ras_if) {
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adev->gmc.umc_ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL);
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if (!adev->gmc.umc_ras_if)
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return -ENOMEM;
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adev->gmc.umc_ras_if->block = AMDGPU_RAS_BLOCK__UMC;
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adev->gmc.umc_ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
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adev->gmc.umc_ras_if->sub_block_index = 0;
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strcpy(adev->gmc.umc_ras_if->name, "umc");
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}
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ih_info->head = fs_info.head = *adev->gmc.umc_ras_if;
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r = amdgpu_ras_late_init(adev, adev->gmc.umc_ras_if,
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&fs_info, ih_info);
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if (r)
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goto free;
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if (amdgpu_ras_is_supported(adev, adev->gmc.umc_ras_if->block)) {
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r = amdgpu_irq_get(adev, &adev->gmc.ecc_irq, 0);
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if (r)
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goto late_fini;
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} else {
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r = 0;
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goto free;
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}
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return 0;
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late_fini:
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amdgpu_ras_late_fini(adev, adev->gmc.umc_ras_if, ih_info);
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free:
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kfree(adev->gmc.umc_ras_if);
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adev->gmc.umc_ras_if = NULL;
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return r;
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}
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@ -230,5 +230,7 @@ void amdgpu_gmc_agp_location(struct amdgpu_device *adev,
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struct amdgpu_gmc *mc);
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bool amdgpu_gmc_filter_faults(struct amdgpu_device *adev, uint64_t addr,
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uint16_t pasid, uint64_t timestamp);
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int amdgpu_gmc_ras_late_init(struct amdgpu_device *adev,
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void *ih_info);
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#endif
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@ -771,39 +771,13 @@ static int gmc_v9_0_ecc_late_init(void *handle)
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{
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int r;
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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struct ras_fs_if umc_fs_info = {
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.sysfs_name = "umc_err_count",
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.debugfs_name = "umc_err_inject",
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};
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struct ras_ih_if umc_ih_info = {
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.cb = gmc_v9_0_process_ras_data_cb,
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};
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if (!adev->gmc.umc_ras_if) {
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adev->gmc.umc_ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL);
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if (!adev->gmc.umc_ras_if)
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return -ENOMEM;
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adev->gmc.umc_ras_if->block = AMDGPU_RAS_BLOCK__UMC;
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adev->gmc.umc_ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
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adev->gmc.umc_ras_if->sub_block_index = 0;
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strcpy(adev->gmc.umc_ras_if->name, "umc");
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}
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umc_ih_info.head = umc_fs_info.head = *adev->gmc.umc_ras_if;
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r = amdgpu_ras_late_init(adev, adev->gmc.umc_ras_if,
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&umc_fs_info, &umc_ih_info);
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r = amdgpu_gmc_ras_late_init(adev, &umc_ih_info);
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if (r)
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goto free;
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if (amdgpu_ras_is_supported(adev, adev->gmc.umc_ras_if->block)) {
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r = amdgpu_irq_get(adev, &adev->gmc.ecc_irq, 0);
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if (r)
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goto umc_late_fini;
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} else {
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/* free umc ras_if if umc ras is not supported */
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r = 0;
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goto free;
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}
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return r;
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if (adev->mmhub_funcs && adev->mmhub_funcs->ras_late_init) {
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r = adev->mmhub_funcs->ras_late_init(adev);
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@ -811,12 +785,6 @@ static int gmc_v9_0_ecc_late_init(void *handle)
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return r;
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}
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return 0;
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umc_late_fini:
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amdgpu_ras_late_fini(adev, adev->gmc.umc_ras_if, &umc_ih_info);
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free:
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kfree(adev->gmc.umc_ras_if);
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adev->gmc.umc_ras_if = NULL;
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return r;
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}
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static int gmc_v9_0_late_init(void *handle)
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