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ASoC: wm8991: Convert to direct regmap API usage
Signed-off-by: Mark Brown <broonie@linaro.org> Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
This commit is contained in:
Mark Brown
parent
8982499582
commit
a86652e51a
1 changed files with 94 additions and 72 deletions
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@ -18,6 +18,7 @@
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/i2c.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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@ -31,76 +32,85 @@
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#include "wm8991.h"
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struct wm8991_priv {
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enum snd_soc_control_type control_type;
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struct regmap *regmap;
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unsigned int pcmclk;
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};
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static const u16 wm8991_reg_defs[] = {
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0x8991, /* R0 - Reset */
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0x0000, /* R1 - Power Management (1) */
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0x6000, /* R2 - Power Management (2) */
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0x0000, /* R3 - Power Management (3) */
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0x4050, /* R4 - Audio Interface (1) */
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0x4000, /* R5 - Audio Interface (2) */
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0x01C8, /* R6 - Clocking (1) */
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0x0000, /* R7 - Clocking (2) */
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0x0040, /* R8 - Audio Interface (3) */
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0x0040, /* R9 - Audio Interface (4) */
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0x0004, /* R10 - DAC CTRL */
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0x00C0, /* R11 - Left DAC Digital Volume */
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0x00C0, /* R12 - Right DAC Digital Volume */
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0x0000, /* R13 - Digital Side Tone */
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0x0100, /* R14 - ADC CTRL */
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0x00C0, /* R15 - Left ADC Digital Volume */
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0x00C0, /* R16 - Right ADC Digital Volume */
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0x0000, /* R17 */
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0x0000, /* R18 - GPIO CTRL 1 */
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0x1000, /* R19 - GPIO1 & GPIO2 */
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0x1010, /* R20 - GPIO3 & GPIO4 */
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0x1010, /* R21 - GPIO5 & GPIO6 */
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0x8000, /* R22 - GPIOCTRL 2 */
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0x0800, /* R23 - GPIO_POL */
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0x008B, /* R24 - Left Line Input 1&2 Volume */
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0x008B, /* R25 - Left Line Input 3&4 Volume */
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0x008B, /* R26 - Right Line Input 1&2 Volume */
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0x008B, /* R27 - Right Line Input 3&4 Volume */
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0x0000, /* R28 - Left Output Volume */
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0x0000, /* R29 - Right Output Volume */
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0x0066, /* R30 - Line Outputs Volume */
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0x0022, /* R31 - Out3/4 Volume */
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0x0079, /* R32 - Left OPGA Volume */
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0x0079, /* R33 - Right OPGA Volume */
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0x0003, /* R34 - Speaker Volume */
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0x0003, /* R35 - ClassD1 */
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0x0000, /* R36 */
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0x0100, /* R37 - ClassD3 */
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0x0000, /* R38 */
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0x0000, /* R39 - Input Mixer1 */
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0x0000, /* R40 - Input Mixer2 */
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0x0000, /* R41 - Input Mixer3 */
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0x0000, /* R42 - Input Mixer4 */
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0x0000, /* R43 - Input Mixer5 */
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0x0000, /* R44 - Input Mixer6 */
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0x0000, /* R45 - Output Mixer1 */
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0x0000, /* R46 - Output Mixer2 */
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0x0000, /* R47 - Output Mixer3 */
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0x0000, /* R48 - Output Mixer4 */
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0x0000, /* R49 - Output Mixer5 */
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0x0000, /* R50 - Output Mixer6 */
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0x0180, /* R51 - Out3/4 Mixer */
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0x0000, /* R52 - Line Mixer1 */
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0x0000, /* R53 - Line Mixer2 */
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0x0000, /* R54 - Speaker Mixer */
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0x0000, /* R55 - Additional Control */
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0x0000, /* R56 - AntiPOP1 */
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0x0000, /* R57 - AntiPOP2 */
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0x0000, /* R58 - MICBIAS */
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0x0000, /* R59 */
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0x0008, /* R60 - PLL1 */
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0x0031, /* R61 - PLL2 */
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0x0026, /* R62 - PLL3 */
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static const struct reg_default wm8991_reg_defaults[] = {
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{ 1, 0x0000 }, /* R1 - Power Management (1) */
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{ 2, 0x6000 }, /* R2 - Power Management (2) */
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{ 3, 0x0000 }, /* R3 - Power Management (3) */
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{ 4, 0x4050 }, /* R4 - Audio Interface (1) */
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{ 5, 0x4000 }, /* R5 - Audio Interface (2) */
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{ 6, 0x01C8 }, /* R6 - Clocking (1) */
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{ 7, 0x0000 }, /* R7 - Clocking (2) */
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{ 8, 0x0040 }, /* R8 - Audio Interface (3) */
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{ 9, 0x0040 }, /* R9 - Audio Interface (4) */
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{ 10, 0x0004 }, /* R10 - DAC CTRL */
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{ 11, 0x00C0 }, /* R11 - Left DAC Digital Volume */
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{ 12, 0x00C0 }, /* R12 - Right DAC Digital Volume */
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{ 13, 0x0000 }, /* R13 - Digital Side Tone */
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{ 14, 0x0100 }, /* R14 - ADC CTRL */
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{ 15, 0x00C0 }, /* R15 - Left ADC Digital Volume */
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{ 16, 0x00C0 }, /* R16 - Right ADC Digital Volume */
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{ 18, 0x0000 }, /* R18 - GPIO CTRL 1 */
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{ 19, 0x1000 }, /* R19 - GPIO1 & GPIO2 */
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{ 20, 0x1010 }, /* R20 - GPIO3 & GPIO4 */
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{ 21, 0x1010 }, /* R21 - GPIO5 & GPIO6 */
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{ 22, 0x8000 }, /* R22 - GPIOCTRL 2 */
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{ 23, 0x0800 }, /* R23 - GPIO_POL */
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{ 24, 0x008B }, /* R24 - Left Line Input 1&2 Volume */
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{ 25, 0x008B }, /* R25 - Left Line Input 3&4 Volume */
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{ 26, 0x008B }, /* R26 - Right Line Input 1&2 Volume */
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{ 27, 0x008B }, /* R27 - Right Line Input 3&4 Volume */
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{ 28, 0x0000 }, /* R28 - Left Output Volume */
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{ 29, 0x0000 }, /* R29 - Right Output Volume */
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{ 30, 0x0066 }, /* R30 - Line Outputs Volume */
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{ 31, 0x0022 }, /* R31 - Out3/4 Volume */
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{ 32, 0x0079 }, /* R32 - Left OPGA Volume */
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{ 33, 0x0079 }, /* R33 - Right OPGA Volume */
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{ 34, 0x0003 }, /* R34 - Speaker Volume */
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{ 35, 0x0003 }, /* R35 - ClassD1 */
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{ 37, 0x0100 }, /* R37 - ClassD3 */
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{ 39, 0x0000 }, /* R39 - Input Mixer1 */
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{ 40, 0x0000 }, /* R40 - Input Mixer2 */
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{ 41, 0x0000 }, /* R41 - Input Mixer3 */
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{ 42, 0x0000 }, /* R42 - Input Mixer4 */
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{ 43, 0x0000 }, /* R43 - Input Mixer5 */
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{ 44, 0x0000 }, /* R44 - Input Mixer6 */
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{ 45, 0x0000 }, /* R45 - Output Mixer1 */
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{ 46, 0x0000 }, /* R46 - Output Mixer2 */
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{ 47, 0x0000 }, /* R47 - Output Mixer3 */
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{ 48, 0x0000 }, /* R48 - Output Mixer4 */
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{ 49, 0x0000 }, /* R49 - Output Mixer5 */
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{ 50, 0x0000 }, /* R50 - Output Mixer6 */
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{ 51, 0x0180 }, /* R51 - Out3/4 Mixer */
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{ 52, 0x0000 }, /* R52 - Line Mixer1 */
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{ 53, 0x0000 }, /* R53 - Line Mixer2 */
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{ 54, 0x0000 }, /* R54 - Speaker Mixer */
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{ 55, 0x0000 }, /* R55 - Additional Control */
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{ 56, 0x0000 }, /* R56 - AntiPOP1 */
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{ 57, 0x0000 }, /* R57 - AntiPOP2 */
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{ 58, 0x0000 }, /* R58 - MICBIAS */
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{ 60, 0x0008 }, /* R60 - PLL1 */
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{ 61, 0x0031 }, /* R61 - PLL2 */
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{ 62, 0x0026 }, /* R62 - PLL3 */
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};
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static bool wm8991_volatile(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case WM8991_RESET:
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return true;
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default:
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return false;
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}
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}
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#define wm8991_reset(c) snd_soc_write(c, WM8991_RESET, 0)
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static const unsigned int rec_mix_tlv[] = {
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@ -1110,6 +1120,7 @@ static int wm8991_mute(struct snd_soc_dai *dai, int mute)
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static int wm8991_set_bias_level(struct snd_soc_codec *codec,
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enum snd_soc_bias_level level)
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{
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struct wm8991_priv *wm8991 = snd_soc_codec_get_drvdata(codec);
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u16 val;
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switch (level) {
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@ -1125,7 +1136,7 @@ static int wm8991_set_bias_level(struct snd_soc_codec *codec,
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case SND_SOC_BIAS_STANDBY:
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if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
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snd_soc_cache_sync(codec);
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regcache_sync(wm8991->regmap);
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/* Enable all output discharge bits */
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snd_soc_write(codec, WM8991_ANTIPOP1, WM8991_DIS_LLINE |
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WM8991_DIS_RLINE | WM8991_DIS_OUT3 |
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@ -1213,7 +1224,7 @@ static int wm8991_set_bias_level(struct snd_soc_codec *codec,
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/* disable POBCTRL, SOFT_ST and BUFDCOPEN */
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snd_soc_write(codec, WM8991_ANTIPOP2, 0x0);
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codec->cache_sync = 1;
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regcache_mark_dirty(wm8991->regmap);
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break;
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}
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@ -1247,7 +1258,7 @@ static int wm8991_probe(struct snd_soc_codec *codec)
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wm8991 = snd_soc_codec_get_drvdata(codec);
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ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8991->control_type);
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ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
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if (ret < 0) {
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dev_err(codec->dev, "Failed to set cache i/o: %d\n", ret);
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return ret;
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@ -1332,9 +1343,17 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8991 = {
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.num_dapm_widgets = ARRAY_SIZE(wm8991_dapm_widgets),
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.dapm_routes = wm8991_dapm_routes,
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.num_dapm_routes = ARRAY_SIZE(wm8991_dapm_routes),
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.reg_cache_size = WM8991_MAX_REGISTER + 1,
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.reg_word_size = sizeof(u16),
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.reg_cache_default = wm8991_reg_defs
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};
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static const struct regmap_config wm8991_regmap = {
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.reg_bits = 8,
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.val_bits = 16,
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.max_register = WM8991_PLL3,
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.volatile_reg = wm8991_volatile,
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.reg_defaults = wm8991_reg_defaults,
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.num_reg_defaults = ARRAY_SIZE(wm8991_reg_defaults),
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.cache_type = REGCACHE_RBTREE,
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};
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static int wm8991_i2c_probe(struct i2c_client *i2c,
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@ -1347,7 +1366,10 @@ static int wm8991_i2c_probe(struct i2c_client *i2c,
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if (!wm8991)
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return -ENOMEM;
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wm8991->control_type = SND_SOC_I2C;
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wm8991->regmap = devm_regmap_init_i2c(i2c, &wm8991_regmap);
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if (IS_ERR(wm8991->regmap))
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return PTR_ERR(wm8991->regmap);
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i2c_set_clientdata(i2c, wm8991);
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ret = snd_soc_register_codec(&i2c->dev,
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