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[PATCH] pciehp: reduce dependence on ACPI

Browse source 
Reduce the PCI Express hotplug driver's dependence on ACPI.
We don't walk the acpi namespace anymore to build a list of
bridges and devices. We go to ACPI only to run the _OSC or
_OSHP methods to transition control of hotplug hardware from
system BIOS to the hotplug driver, and to run the _HPP
method to get hotplug device parameters like cache line size,
latency timer and SERR/PERR enable from BIOS.

Note that one of the side effects of this patch is that pciehp
does not automatically enable the hot-added device or its DMA
bus mastering capability now. It expects the device driver to
do that. This may break some drivers and we will have to fix
them as they are reported.

Signed-off-by: Rajesh Shah <rajesh.shah@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
rajesh.shah@intel.com 2005-10-31 16:20:07 -08:00 committed by Greg Kroah-Hartman
parent 71b720c0f9
commit a8a2be9492
8 changed files with 96 additions and 993 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

11
drivers/pci/hotplug/pciehp.h
View file

@ -49,6 +49,13 @@ extern int pciehp_debug;
#define info(format, arg...) printk(KERN_INFO "%s: " format, MY_NAME , ## arg)
#define warn(format, arg...) printk(KERN_WARNING "%s: " format, MY_NAME , ## arg)
struct hotplug_params {
u8 cache_line_size;
u8 latency_timer;
u8 enable_serr;
u8 enable_perr;
};
struct pci_func {
struct pci_func *next;
u8 bus;
@ -199,6 +206,10 @@ extern int pciehp_save_config (struct controller *ctrl, int busnumber, int num
extern int pciehp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot);
extern int pciehp_configure_device (struct slot *ctrl);
extern int pciehp_unconfigure_device (struct pci_func* func);
extern int get_hp_hw_control_from_firmware(struct pci_dev *dev);
extern void get_hp_params_from_firmware(struct pci_dev *dev,
struct hotplug_params *hpp);
/* Global variables */

20
drivers/pci/hotplug/pciehp_core.c
View file

@ -39,7 +39,6 @@
#include <linux/init.h>
#include <asm/uaccess.h>
#include "pciehp.h"
#include "pciehprm.h"
#include <linux/interrupt.h>
/* Global variables */
@ -381,6 +380,7 @@ static int pciehp_probe(struct pcie_device *dev, const struct pcie_port_service_
dbg("%s: DRV_thread pid = %d\n", __FUNCTION__, current->pid);
pdev = dev->port;
ctrl->pci_dev = pdev;
rc = pcie_init(ctrl, dev,
(php_intr_callback_t) pciehp_handle_attention_button,
@ -392,8 +392,6 @@ static int pciehp_probe(struct pcie_device *dev, const struct pcie_port_service_
goto err_out_free_ctrl;
}
ctrl->pci_dev = pdev;
pci_set_drvdata(pdev, ctrl);
ctrl->pci_bus = kmalloc(sizeof(*ctrl->pci_bus), GFP_KERNEL);
@ -609,18 +607,14 @@ static int __init pcied_init(void)
if (retval)
goto error_hpc_init;
retval = pciehprm_init(PCI);
if (!retval) {
retval = pcie_port_service_register(&hpdriver_portdrv);
dbg("pcie_port_service_register = %d\n", retval);
info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
if (retval)
dbg("%s: Failure to register service\n", __FUNCTION__);
}
retval = pcie_port_service_register(&hpdriver_portdrv);
dbg("pcie_port_service_register = %d\n", retval);
info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
if (retval)
dbg("%s: Failure to register service\n", __FUNCTION__);
error_hpc_init:
if (retval) {
pciehprm_cleanup();
pciehp_event_stop_thread();
};
@ -632,8 +626,6 @@ static void __exit pcied_cleanup(void)
dbg("unload_pciehpd()\n");
unload_pciehpd();
pciehprm_cleanup();
dbg("pcie_port_service_unregister\n");
pcie_port_service_unregister(&hpdriver_portdrv);

1
drivers/pci/hotplug/pciehp_ctrl.c
View file

@ -40,7 +40,6 @@
#include <linux/pci.h>
#include "../pci.h"
#include "pciehp.h"
#include "pciehprm.h"
static void interrupt_event_handler(struct controller *ctrl);

4
drivers/pci/hotplug/pciehp_hpc.c
View file

@ -1470,6 +1470,10 @@ int pcie_init(struct controller * ctrl,
}
dbg("%s: SLOT_STATUS offset %x writes slot_status %x\n", __FUNCTION__, SLOT_STATUS(ctrl->cap_base), temp_word);
rc = get_hp_hw_control_from_firmware(ctrl->pci_dev);
if (rc)
goto abort_free_ctlr;
/* Add this HPC instance into the HPC list */
spin_lock(&list_lock);
if (php_ctlr_list_head == 0) {

52
drivers/pci/hotplug/pciehprm.h
View file

@ -1,52 +0,0 @@
/*
* PCIEHPRM : PCIEHP Resource Manager for ACPI/non-ACPI platform
*
* Copyright (C) 1995,2001 Compaq Computer Corporation
* Copyright (C) 2001,2003 Greg Kroah-Hartman (greg@kroah.com)
* Copyright (C) 2001 IBM Corp.
* Copyright (C) 2003-2004 Intel Corporation
*
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or (at
* your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for more
* details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*
* Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
*
*/
#ifndef _PCIEHPRM_H_
#define _PCIEHPRM_H_
#ifdef CONFIG_HOTPLUG_PCI_PCIE_PHPRM_NONACPI
#include "pciehprm_nonacpi.h"
#endif
int pciehprm_init(enum php_ctlr_type ct);
void pciehprm_cleanup(void);
int pciehprm_print_pirt(void);
int pciehprm_find_available_resources(struct controller *ctrl);
int pciehprm_set_hpp(struct controller *ctrl, struct pci_func *func, u8 card_type);
void pciehprm_enable_card(struct controller *ctrl, struct pci_func *func, u8 card_type);
#ifdef DEBUG
#define RES_CHECK(this, bits) \
{ if (((this) & (bits - 1))) \
printk("%s:%d ERR: potential res loss!\n", __FUNCTION__, __LINE__); }
#else
#define RES_CHECK(this, bits)
#endif
#endif /* _PCIEHPRM_H_ */

838
drivers/pci/hotplug/pciehprm_acpi.c
View file

@ -39,70 +39,11 @@
#include <acpi/acpi_bus.h>
#include <acpi/actypes.h>
#include "pciehp.h"
#include "pciehprm.h"
#define PCI_MAX_BUS 0x100
#define ACPI_STA_DEVICE_PRESENT 0x01
#define METHOD_NAME__SUN "_SUN"
#define METHOD_NAME__HPP "_HPP"
#define METHOD_NAME_OSHP "OSHP"
/* Status code for running acpi method to gain native control */
#define NC_NOT_RUN 0
#define OSC_NOT_EXIST 1
#define OSC_RUN_FAILED 2
#define OSHP_NOT_EXIST 3
#define OSHP_RUN_FAILED 4
#define NC_RUN_SUCCESS 5
#define PHP_RES_BUS 0xA0
#define PHP_RES_IO 0xA1
#define PHP_RES_MEM 0xA2
#define PHP_RES_PMEM 0xA3
#define BRIDGE_TYPE_P2P 0x00
#define BRIDGE_TYPE_HOST 0x01
/* this should go to drivers/acpi/include/ */
struct acpi__hpp {
u8 cache_line_size;
u8 latency_timer;
u8 enable_serr;
u8 enable_perr;
};
struct acpi_php_slot {
struct acpi_php_slot *next;
struct acpi_bridge *bridge;
acpi_handle handle;
int seg;
int bus;
int dev;
int fun;
u32 sun;
void *slot_ops; /* _STA, _EJx, etc */
struct slot *slot;
}; /* per func */
struct acpi_bridge {
struct acpi_bridge *parent;
struct acpi_bridge *next;
struct acpi_bridge *child;
acpi_handle handle;
int seg;
int pbus; /* pdev->bus->number */
int pdevice; /* PCI_SLOT(pdev->devfn) */
int pfunction; /* PCI_DEVFN(pdev->devfn) */
int bus; /* pdev->subordinate->number */
struct acpi__hpp *_hpp;
struct acpi_php_slot *slots;
int scanned;
int type;
};
static struct acpi_bridge *acpi_bridges_head;
static u8 * acpi_path_name( acpi_handle handle)
{
acpi_status status;
@ -118,85 +59,43 @@ static u8 * acpi_path_name( acpi_handle handle)
return path_name;
}
static void acpi_get__hpp ( struct acpi_bridge *ab);
static int acpi_run_oshp ( struct acpi_bridge *ab);
static int osc_run_status = NC_NOT_RUN;
static int oshp_run_status = NC_NOT_RUN;
static int acpi_add_slot_to_php_slots(
struct acpi_bridge *ab,
int bus_num,
acpi_handle handle,
u32 adr,
u32 sun
)
{
struct acpi_php_slot *aps;
static long samesun = -1;
aps = (struct acpi_php_slot *) kmalloc (sizeof(struct acpi_php_slot), GFP_KERNEL);
if (!aps) {
err ("acpi_pciehprm: alloc for aps fail\n");
return -1;
}
memset(aps, 0, sizeof(struct acpi_php_slot));
aps->handle = handle;
aps->bus = bus_num;
aps->dev = (adr >> 16) & 0xffff;
aps->fun = adr & 0xffff;
aps->sun = sun;
aps->next = ab->slots; /* cling to the bridge */
aps->bridge = ab;
ab->slots = aps;
ab->scanned += 1;
if (!ab->_hpp)
acpi_get__hpp(ab);
if (osc_run_status == OSC_NOT_EXIST)
oshp_run_status = acpi_run_oshp(ab);
if (sun != samesun) {
info("acpi_pciehprm: Slot sun(%x) at s:b:d:f=0x%02x:%02x:%02x:%02x\n",
aps->sun, ab->seg, aps->bus, aps->dev, aps->fun);
samesun = sun;
}
return 0;
}
static void acpi_get__hpp ( struct acpi_bridge *ab)
static acpi_status
acpi_run_hpp(acpi_handle handle, struct hotplug_params *hpp)
{
acpi_status status;
u8 nui[4];
struct acpi_buffer ret_buf = { 0, NULL};
union acpi_object *ext_obj, *package;
u8 *path_name = acpi_path_name(ab->handle);
u8 *path_name = acpi_path_name(handle);
int i, len = 0;
/* get _hpp */
status = acpi_evaluate_object(ab->handle, METHOD_NAME__HPP, NULL, &ret_buf);
status = acpi_evaluate_object(handle, METHOD_NAME__HPP, NULL, &ret_buf);
switch (status) {
case AE_BUFFER_OVERFLOW:
ret_buf.pointer = kmalloc (ret_buf.length, GFP_KERNEL);
if (!ret_buf.pointer) {
err ("acpi_pciehprm:%s alloc for _HPP fail\n", path_name);
return;
err ("%s:%s alloc for _HPP fail\n", __FUNCTION__,
path_name);
return AE_NO_MEMORY;
}
status = acpi_evaluate_object(ab->handle, METHOD_NAME__HPP, NULL, &ret_buf);
status = acpi_evaluate_object(handle, METHOD_NAME__HPP,
NULL, &ret_buf);
if (ACPI_SUCCESS(status))
break;
default:
if (ACPI_FAILURE(status)) {
err("acpi_pciehprm:%s _HPP fail=0x%x\n", path_name, status);
return;
dbg("%s:%s _HPP fail=0x%x\n", __FUNCTION__,
path_name, status);
return status;
}
}
ext_obj = (union acpi_object *) ret_buf.pointer;
if (ext_obj->type != ACPI_TYPE_PACKAGE) {
err ("acpi_pciehprm:%s _HPP obj not a package\n", path_name);
err ("%s:%s _HPP obj not a package\n", __FUNCTION__,
path_name);
status = AE_ERROR;
goto free_and_return;
}
@ -209,689 +108,94 @@ static void acpi_get__hpp ( struct acpi_bridge *ab)
nui[i] = (u8)ext_obj->integer.value;
break;
default:
err ("acpi_pciehprm:%s _HPP obj type incorrect\n", path_name);
err ("%s:%s _HPP obj type incorrect\n", __FUNCTION__,
path_name);
status = AE_ERROR;
goto free_and_return;
}
}
ab->_hpp = kmalloc (sizeof (struct acpi__hpp), GFP_KERNEL);
if (!ab->_hpp) {
err ("acpi_pciehprm:%s alloc for _HPP failed\n", path_name);
goto free_and_return;
}
memset(ab->_hpp, 0, sizeof(struct acpi__hpp));
hpp->cache_line_size = nui[0];
hpp->latency_timer = nui[1];
hpp->enable_serr = nui[2];
hpp->enable_perr = nui[3];
ab->_hpp->cache_line_size = nui[0];
ab->_hpp->latency_timer = nui[1];
ab->_hpp->enable_serr = nui[2];
ab->_hpp->enable_perr = nui[3];
dbg(" _HPP: cache_line_size=0x%x\n", ab->_hpp->cache_line_size);
dbg(" _HPP: latency timer =0x%x\n", ab->_hpp->latency_timer);
dbg(" _HPP: enable SERR =0x%x\n", ab->_hpp->enable_serr);
dbg(" _HPP: enable PERR =0x%x\n", ab->_hpp->enable_perr);
dbg(" _HPP: cache_line_size=0x%x\n", hpp->cache_line_size);
dbg(" _HPP: latency timer =0x%x\n", hpp->latency_timer);
dbg(" _HPP: enable SERR =0x%x\n", hpp->enable_serr);
dbg(" _HPP: enable PERR =0x%x\n", hpp->enable_perr);
free_and_return:
kfree(ret_buf.pointer);
return status;
}
static int acpi_run_oshp ( struct acpi_bridge *ab)
static acpi_status acpi_run_oshp(acpi_handle handle)
{
acpi_status status;
u8 *path_name = acpi_path_name(ab->handle);
u8 *path_name = acpi_path_name(handle);
/* run OSHP */
status = acpi_evaluate_object(ab->handle, METHOD_NAME_OSHP, NULL, NULL);
status = acpi_evaluate_object(handle, METHOD_NAME_OSHP, NULL, NULL);
if (ACPI_FAILURE(status)) {
err("acpi_pciehprm:%s OSHP fails=0x%x\n", path_name, status);
oshp_run_status = (status == AE_NOT_FOUND) ? OSHP_NOT_EXIST : OSHP_RUN_FAILED;
err("%s:%s OSHP fails=0x%x\n", __FUNCTION__, path_name,
status);
} else {
oshp_run_status = NC_RUN_SUCCESS;
dbg("acpi_pciehprm:%s OSHP passes =0x%x\n", path_name, status);
dbg("acpi_pciehprm:%s oshp_run_status =0x%x\n", path_name, oshp_run_status);
dbg("%s:%s OSHP passes\n", __FUNCTION__, path_name);
}
return oshp_run_status;
return status;
}
/* find acpi_bridge downword from ab. */
static struct acpi_bridge *
find_acpi_bridge_by_bus(
struct acpi_bridge *ab,
int seg,
int bus /* pdev->subordinate->number */
)
int get_hp_hw_control_from_firmware(struct pci_dev *dev)
{
struct acpi_bridge *lab = NULL;
acpi_status status;
/*
* Per PCI firmware specification, we should run the ACPI _OSC
* method to get control of hotplug hardware before using it
*/
/* Fixme: run _OSC for a specific host bridge, not all of them */
status = pci_osc_control_set(OSC_PCI_EXPRESS_NATIVE_HP_CONTROL);
if (!ab)
return NULL;
if ((ab->bus == bus) && (ab->seg == seg))
return ab;
if (ab->child)
lab = find_acpi_bridge_by_bus(ab->child, seg, bus);
if (!lab)
if (ab->next)
lab = find_acpi_bridge_by_bus(ab->next, seg, bus);
return lab;
}
/*
* Build a device tree of ACPI PCI Bridges
*/
static void pciehprm_acpi_register_a_bridge (
struct acpi_bridge **head,
struct acpi_bridge *pab, /* parent bridge to which child bridge is added */
struct acpi_bridge *cab /* child bridge to add */
)
{
struct acpi_bridge *lpab;
struct acpi_bridge *lcab;
lpab = find_acpi_bridge_by_bus(*head, pab->seg, pab->bus);
if (!lpab) {
if (!(pab->type & BRIDGE_TYPE_HOST))
warn("PCI parent bridge s:b(%x:%x) not in list.\n", pab->seg, pab->bus);
pab->next = *head;
*head = pab;
lpab = pab;
/* Fixme: fail native hotplug if _OSC does not exist for root ports */
if (status == AE_NOT_FOUND) {
/*
* Some older BIOS's don't support _OSC but support
* OSHP to do the same thing
*/
acpi_handle handle = DEVICE_ACPI_HANDLE(&(dev->dev));
if (handle)
status = acpi_run_oshp(handle);
}
if ((cab->type & BRIDGE_TYPE_HOST) && (pab == cab))
return;
lcab = find_acpi_bridge_by_bus(*head, cab->seg, cab->bus);
if (lcab) {
if ((pab->bus != lcab->parent->bus) || (lcab->bus != cab->bus))
err("PCI child bridge s:b(%x:%x) in list with diff parent.\n", cab->seg, cab->bus);
return;
} else
lcab = cab;
lcab->parent = lpab;
lcab->next = lpab->child;
lpab->child = lcab;
}
static acpi_status pciehprm_acpi_build_php_slots_callback(
acpi_handle handle,
u32 Level,
void *context,
void **retval
)
{
ulong bus_num;
ulong seg_num;
ulong sun, adr;
ulong padr = 0;
acpi_handle phandle = NULL;
struct acpi_bridge *pab = (struct acpi_bridge *)context;
struct acpi_bridge *lab;
acpi_status status;
u8 *path_name = acpi_path_name(handle);
/* get _SUN */
status = acpi_evaluate_integer(handle, METHOD_NAME__SUN, NULL, &sun);
switch(status) {
case AE_NOT_FOUND:
return AE_OK;
default:
if (ACPI_FAILURE(status)) {
err("acpi_pciehprm:%s _SUN fail=0x%x\n", path_name, status);
return status;
}
}
/* get _ADR. _ADR must exist if _SUN exists */
status = acpi_evaluate_integer(handle, METHOD_NAME__ADR, NULL, &adr);
if (ACPI_FAILURE(status)) {
err("acpi_pciehprm:%s _ADR fail=0x%x\n", path_name, status);
return status;
}
dbg("acpi_pciehprm:%s sun=0x%08x adr=0x%08x\n", path_name, (u32)sun, (u32)adr);
status = acpi_get_parent(handle, &phandle);
if (ACPI_FAILURE(status)) {
err("acpi_pciehprm:%s get_parent fail=0x%x\n", path_name, status);
return (status);
}
bus_num = pab->bus;
seg_num = pab->seg;
if (pab->bus == bus_num) {
lab = pab;
} else {
dbg("WARN: pab is not parent\n");
lab = find_acpi_bridge_by_bus(pab, seg_num, bus_num);
if (!lab) {
dbg("acpi_pciehprm: alloc new P2P bridge(%x) for sun(%08x)\n", (u32)bus_num, (u32)sun);
lab = (struct acpi_bridge *)kmalloc(sizeof(struct acpi_bridge), GFP_KERNEL);
if (!lab) {
err("acpi_pciehprm: alloc for ab fail\n");
return AE_NO_MEMORY;
}
memset(lab, 0, sizeof(struct acpi_bridge));
lab->handle = phandle;
lab->pbus = pab->bus;
lab->pdevice = (int)(padr >> 16) & 0xffff;
lab->pfunction = (int)(padr & 0xffff);
lab->bus = (int)bus_num;
lab->scanned = 0;
lab->type = BRIDGE_TYPE_P2P;
pciehprm_acpi_register_a_bridge (&acpi_bridges_head, pab, lab);
} else
dbg("acpi_pciehprm: found P2P bridge(%x) for sun(%08x)\n", (u32)bus_num, (u32)sun);
}
acpi_add_slot_to_php_slots(lab, (int)bus_num, handle, (u32)adr, (u32)sun);
return (status);
}
static int pciehprm_acpi_build_php_slots(
struct acpi_bridge *ab,
u32 depth
)
{
acpi_status status;
u8 *path_name = acpi_path_name(ab->handle);
/* Walk down this pci bridge to get _SUNs if any behind P2P */
status = acpi_walk_namespace ( ACPI_TYPE_DEVICE,
ab->handle,
depth,
pciehprm_acpi_build_php_slots_callback,
ab,
NULL );
if (ACPI_FAILURE(status)) {
dbg("acpi_pciehprm:%s walk for _SUN on pci bridge seg:bus(%x:%x) fail=0x%x\n", path_name, ab->seg, ab->bus, status);
err("Cannot get control of hotplug hardware\n");
return -1;
}
dbg("Sucess getting control of hotplug hardware\n");
return 0;
}
static void build_a_bridge(
struct acpi_bridge *pab,
struct acpi_bridge *ab
)
void get_hp_params_from_firmware(struct pci_dev *dev,
struct hotplug_params *hpp)
{
u8 *path_name = acpi_path_name(ab->handle);
pciehprm_acpi_register_a_bridge (&acpi_bridges_head, pab, ab);
switch (ab->type) {
case BRIDGE_TYPE_HOST:
dbg("acpi_pciehprm: Registered PCI HOST Bridge(%02x) on s:b:d:f(%02x:%02x:%02x:%02x) [%s]\n",
ab->bus, ab->seg, ab->pbus, ab->pdevice, ab->pfunction, path_name);
break;
case BRIDGE_TYPE_P2P:
dbg("acpi_pciehprm: Registered PCI P2P Bridge(%02x-%02x) on s:b:d:f(%02x:%02x:%02x:%02x) [%s]\n",
ab->pbus, ab->bus, ab->seg, ab->pbus, ab->pdevice, ab->pfunction, path_name);
break;
};
/* build any immediate PHP slots under this pci bridge */
pciehprm_acpi_build_php_slots(ab, 1);
}
static struct acpi_bridge * add_p2p_bridge(
acpi_handle handle,
struct acpi_bridge *pab, /* parent */
ulong adr
)
{
struct acpi_bridge *ab;
struct pci_dev *pdev;
ulong devnum, funcnum;
u8 *path_name = acpi_path_name(handle);
ab = (struct acpi_bridge *) kmalloc (sizeof(struct acpi_bridge), GFP_KERNEL);
if (!ab) {
err("acpi_pciehprm: alloc for ab fail\n");
return NULL;
}
memset(ab, 0, sizeof(struct acpi_bridge));
devnum = (adr >> 16) & 0xffff;
funcnum = adr & 0xffff;
pdev = pci_find_slot(pab->bus, PCI_DEVFN(devnum, funcnum));
if (!pdev || !pdev->subordinate) {
err("acpi_pciehprm:%s is not a P2P Bridge\n", path_name);
kfree(ab);
return NULL;
}
ab->handle = handle;
ab->seg = pab->seg;
ab->pbus = pab->bus; /* or pdev->bus->number */
ab->pdevice = devnum; /* or PCI_SLOT(pdev->devfn) */
ab->pfunction = funcnum; /* or PCI_FUNC(pdev->devfn) */
ab->bus = pdev->subordinate->number;
ab->scanned = 0;
ab->type = BRIDGE_TYPE_P2P;
dbg("acpi_pciehprm: P2P(%x-%x) on pci=b:d:f(%x:%x:%x) acpi=b:d:f(%x:%x:%x) [%s]\n",
pab->bus, ab->bus, pdev->bus->number, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn),
pab->bus, (u32)devnum, (u32)funcnum, path_name);
build_a_bridge(pab, ab);
return ab;
}
static acpi_status scan_p2p_bridge(
acpi_handle handle,
u32 Level,
void *context,
void **retval
)
{
struct acpi_bridge *pab = (struct acpi_bridge *)context;
struct acpi_bridge *ab;
acpi_status status;
ulong adr = 0;
u8 *path_name = acpi_path_name(handle);
ulong devnum, funcnum;
struct pci_dev *pdev;
/* get device, function */
status = acpi_evaluate_integer(handle, METHOD_NAME__ADR, NULL, &adr);
if (ACPI_FAILURE(status)) {
if (status != AE_NOT_FOUND)
err("acpi_pciehprm:%s _ADR fail=0x%x\n", path_name, status);
return AE_OK;
}
devnum = (adr >> 16) & 0xffff;
funcnum = adr & 0xffff;
pdev = pci_find_slot(pab->bus, PCI_DEVFN(devnum, funcnum));
if (!pdev)
return AE_OK;
if (!pdev->subordinate)
return AE_OK;
ab = add_p2p_bridge(handle, pab, adr);
if (ab) {
status = acpi_walk_namespace ( ACPI_TYPE_DEVICE,
handle,
(u32)1,
scan_p2p_bridge,
ab,
NULL);
if (ACPI_FAILURE(status))
dbg("acpi_pciehprm:%s find_p2p fail=0x%x\n", path_name, status);
}
return AE_OK;
}
static struct acpi_bridge * add_host_bridge(
acpi_handle handle,
ulong segnum,
ulong busnum
)
{
ulong adr = 0;
acpi_status status;
struct acpi_bridge *ab;
u8 *path_name = acpi_path_name(handle);
/* get device, function: host br adr is always 0000 though. */
status = acpi_evaluate_integer(handle, METHOD_NAME__ADR, NULL, &adr);
if (ACPI_FAILURE(status)) {
err("acpi_pciehprm:%s _ADR fail=0x%x\n", path_name, status);
return NULL;
}
dbg("acpi_pciehprm: ROOT PCI seg(0x%x)bus(0x%x)dev(0x%x)func(0x%x) [%s]\n", (u32)segnum,
(u32)busnum, (u32)(adr >> 16) & 0xffff, (u32)adr & 0xffff, path_name);
ab = (struct acpi_bridge *) kmalloc (sizeof(struct acpi_bridge), GFP_KERNEL);
if (!ab) {
err("acpi_pciehprm: alloc for ab fail\n");
return NULL;
}
memset(ab, 0, sizeof(struct acpi_bridge));
ab->handle = handle;
ab->seg = (int)segnum;
ab->bus = ab->pbus = (int)busnum;
ab->pdevice = (int)(adr >> 16) & 0xffff;
ab->pfunction = (int)(adr & 0xffff);
ab->scanned = 0;
ab->type = BRIDGE_TYPE_HOST;
status = pci_osc_control_set (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL);
if (ACPI_FAILURE(status)) {
err("%s: status %x\n", __FUNCTION__, status);
osc_run_status = (status == AE_NOT_FOUND) ? OSC_NOT_EXIST : OSC_RUN_FAILED;
} else {
osc_run_status = NC_RUN_SUCCESS;
}
dbg("%s: osc_run_status %x\n", __FUNCTION__, osc_run_status);
build_a_bridge(ab, ab);
return ab;
}
static acpi_status acpi_scan_from_root_pci_callback (
acpi_handle handle,
u32 Level,
void *context,
void **retval
)
{
ulong segnum = 0;
ulong busnum = 0;
acpi_status status;
struct acpi_bridge *ab;
u8 *path_name = acpi_path_name(handle);
/* get bus number of this pci root bridge */
status = acpi_evaluate_integer(handle, METHOD_NAME__SEG, NULL, &segnum);
if (ACPI_FAILURE(status)) {
if (status != AE_NOT_FOUND) {
err("acpi_pciehprm:%s evaluate _SEG fail=0x%x\n", path_name, status);
return status;
}
segnum = 0;
}
/* get bus number of this pci root bridge */
status = acpi_evaluate_integer(handle, METHOD_NAME__BBN, NULL, &busnum);
if (ACPI_FAILURE(status)) {
err("acpi_pciehprm:%s evaluate _BBN fail=0x%x\n", path_name, status);
return (status);
}
ab = add_host_bridge(handle, segnum, busnum);
if (ab) {
status = acpi_walk_namespace ( ACPI_TYPE_DEVICE,
handle,
1,
scan_p2p_bridge,
ab,
NULL);
if (ACPI_FAILURE(status))
dbg("acpi_pciehprm:%s find_p2p fail=0x%x\n", path_name, status);
}
return AE_OK;
}
static int pciehprm_acpi_scan_pci (void)
{
acpi_status status;
acpi_status status = AE_NOT_FOUND;
struct pci_dev *pdev = dev;
/*
* TBD: traverse LDM device tree with the help of
* unified ACPI augmented for php device population.
* _HPP settings apply to all child buses, until another _HPP is
* encountered. If we don't find an _HPP for the input pci dev,
* look for it in the parent device scope since that would apply to
* this pci dev. If we don't find any _HPP, use hardcoded defaults
*/
status = acpi_get_devices ( PCI_ROOT_HID_STRING,
acpi_scan_from_root_pci_callback,
NULL,
NULL );
if (ACPI_FAILURE(status)) {
err("acpi_pciehprm:get_device PCI ROOT HID fail=0x%x\n", status);
return -1;
}
return 0;
}
int pciehprm_init(enum php_ctlr_type ctlr_type)
{
int rc;
if (ctlr_type != PCI)
return -ENODEV;
dbg("pciehprm ACPI init <enter>\n");
acpi_bridges_head = NULL;
/* construct PCI bus:device tree of acpi_handles */
rc = pciehprm_acpi_scan_pci();
if (rc)
return rc;
if ((oshp_run_status != NC_RUN_SUCCESS) && (osc_run_status != NC_RUN_SUCCESS)) {
err("Fails to gain control of native hot-plug\n");
rc = -ENODEV;
}
dbg("pciehprm ACPI init %s\n", (rc)?"fail":"success");
return rc;
}
static void free_a_slot(struct acpi_php_slot *aps)
{
dbg(" free a php func of slot(0x%02x) on PCI b:d:f=0x%02x:%02x:%02x\n", aps->sun, aps->bus, aps->dev, aps->fun);
kfree(aps);
}
static void free_a_bridge( struct acpi_bridge *ab)
{
struct acpi_php_slot *aps, *next;
switch (ab->type) {
case BRIDGE_TYPE_HOST:
dbg("Free ACPI PCI HOST Bridge(%x) [%s] on s:b:d:f(%x:%x:%x:%x)\n",
ab->bus, acpi_path_name(ab->handle), ab->seg, ab->pbus, ab->pdevice, ab->pfunction);
break;
case BRIDGE_TYPE_P2P:
dbg("Free ACPI PCI P2P Bridge(%x-%x) [%s] on s:b:d:f(%x:%x:%x:%x)\n",
ab->pbus, ab->bus, acpi_path_name(ab->handle), ab->seg, ab->pbus, ab->pdevice, ab->pfunction);
break;
};
/* free slots first */
for (aps = ab->slots; aps; aps = next) {
next = aps->next;
free_a_slot(aps);
}
kfree(ab);
}
static void pciehprm_free_bridges ( struct acpi_bridge *ab)
{
if (!ab)
return;
if (ab->child)
pciehprm_free_bridges (ab->child);
if (ab->next)
pciehprm_free_bridges (ab->next);
free_a_bridge(ab);
}
void pciehprm_cleanup(void)
{
pciehprm_free_bridges (acpi_bridges_head);
}
static int get_number_of_slots (
struct acpi_bridge *ab,
int selfonly
)
{
struct acpi_php_slot *aps;
int prev_slot = -1;
int slot_num = 0;
for ( aps = ab->slots; aps; aps = aps->next)
if (aps->dev != prev_slot) {
prev_slot = aps->dev;
slot_num++;
}
if (ab->child)
slot_num += get_number_of_slots (ab->child, 0);
if (selfonly)
return slot_num;
if (ab->next)
slot_num += get_number_of_slots (ab->next, 0);
return slot_num;
}
static struct acpi_php_slot * get_acpi_slot (
struct acpi_bridge *ab,
u32 sun
)
{
struct acpi_php_slot *aps = NULL;
for ( aps = ab->slots; aps; aps = aps->next)
if (aps->sun == sun)
return aps;
if (!aps && ab->child) {
aps = (struct acpi_php_slot *)get_acpi_slot (ab->child, sun);
if (aps)
return aps;
}
if (!aps && ab->next) {
aps = (struct acpi_php_slot *)get_acpi_slot (ab->next, sun);
if (aps)
return aps;
}
return aps;
}
#if 0
void * pciehprm_get_slot(struct slot *slot)
{
struct acpi_bridge *ab = acpi_bridges_head;
struct acpi_php_slot *aps = get_acpi_slot (ab, slot->number);
aps->slot = slot;
dbg("Got acpi slot sun(%x): s:b:d:f(%x:%x:%x:%x)\n", aps->sun, aps->seg, aps->bus, aps->dev, aps->fun);
return (void *)aps;
}
#endif
int pciehprm_set_hpp(
struct controller *ctrl,
struct pci_func *func,
u8 card_type
)
{
struct acpi_bridge *ab;
struct pci_bus lpci_bus, *pci_bus;
int rc = 0;
unsigned int devfn;
u8 cls= 0x08; /* default cache line size */
u8 lt = 0x40; /* default latency timer */
u8 ep = 0;
u8 es = 0;
memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
pci_bus = &lpci_bus;
pci_bus->number = func->bus;
devfn = PCI_DEVFN(func->device, func->function);
ab = find_acpi_bridge_by_bus(acpi_bridges_head, ctrl->seg, ctrl->bus);
if (ab) {
if (ab->_hpp) {
lt = (u8)ab->_hpp->latency_timer;
cls = (u8)ab->_hpp->cache_line_size;
ep = (u8)ab->_hpp->enable_perr;
es = (u8)ab->_hpp->enable_serr;
} else
dbg("_hpp: no _hpp for B/D/F=%#x/%#x/%#x. use default value\n", func->bus, func->device, func->function);
} else
dbg("_hpp: no acpi bridge for B/D/F = %#x/%#x/%#x. use default value\n", func->bus, func->device, func->function);
if (card_type == PCI_HEADER_TYPE_BRIDGE) {
/* set subordinate Latency Timer */
rc |= pci_bus_write_config_byte(pci_bus, devfn, PCI_SEC_LATENCY_TIMER, lt);
}
/* set base Latency Timer */
rc |= pci_bus_write_config_byte(pci_bus, devfn, PCI_LATENCY_TIMER, lt);
dbg(" set latency timer =0x%02x: %x\n", lt, rc);
rc |= pci_bus_write_config_byte(pci_bus, devfn, PCI_CACHE_LINE_SIZE, cls);
dbg(" set cache_line_size=0x%02x: %x\n", cls, rc);
return rc;
}
void pciehprm_enable_card(
struct controller *ctrl,
struct pci_func *func,
u8 card_type)
{
u16 command, cmd, bcommand, bcmd;
struct pci_bus lpci_bus, *pci_bus;
struct acpi_bridge *ab;
unsigned int devfn;
int rc;
memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
pci_bus = &lpci_bus;
pci_bus->number = func->bus;
devfn = PCI_DEVFN(func->device, func->function);
rc = pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &cmd);
if (card_type == PCI_HEADER_TYPE_BRIDGE) {
rc = pci_bus_read_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, &bcmd);
}
command = cmd | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE
| PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
bcommand = bcmd | PCI_BRIDGE_CTL_NO_ISA;
ab = find_acpi_bridge_by_bus(acpi_bridges_head, ctrl->seg, ctrl->bus);
if (ab) {
if (ab->_hpp) {
if (ab->_hpp->enable_perr) {
command |= PCI_COMMAND_PARITY;
bcommand |= PCI_BRIDGE_CTL_PARITY;
} else {
command &= ~PCI_COMMAND_PARITY;
bcommand &= ~PCI_BRIDGE_CTL_PARITY;
}
if (ab->_hpp->enable_serr) {
command |= PCI_COMMAND_SERR;
bcommand |= PCI_BRIDGE_CTL_SERR;
} else {
command &= ~PCI_COMMAND_SERR;
bcommand &= ~PCI_BRIDGE_CTL_SERR;
}
} else
dbg("no _hpp for B/D/F = %#x/%#x/%#x.\n", func->bus, func->device, func->function);
} else
dbg("no acpi bridge for B/D/F = %#x/%#x/%#x.\n", func->bus, func->device, func->function);
if (command != cmd) {
rc = pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
}
if ((card_type == PCI_HEADER_TYPE_BRIDGE) && (bcommand != bcmd)) {
rc = pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, bcommand);
while (pdev && (ACPI_FAILURE(status))) {
acpi_handle handle = DEVICE_ACPI_HANDLE(&(pdev->dev));
if (!handle)
break;
status = acpi_run_hpp(handle, hpp);
if (!(pdev->bus->parent))
break;
/* Check if a parent object supports _HPP */
pdev = pdev->bus->parent->self;
}
}

107
drivers/pci/hotplug/pciehprm_nonacpi.c
View file

@ -37,15 +37,9 @@
#include <linux/slab.h>
#include <asm/uaccess.h>
#include "pciehp.h"
#include "pciehprm.h"
#include "pciehprm_nonacpi.h"
void pciehprm_cleanup(void)
{
return;
}
int pciehprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busnum, u8 devnum)
{
@ -53,106 +47,13 @@ int pciehprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busn
return 0;
}
int pciehprm_set_hpp(
struct controller *ctrl,
struct pci_func *func,
u8 card_type)
void get_hp_params_from_firmware(struct pci_dev *dev,
struct hotplug_params *hpp)
{
u32 rc;
u8 temp_byte;
struct pci_bus lpci_bus, *pci_bus;
unsigned int devfn;
memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
pci_bus = &lpci_bus;
pci_bus->number = func->bus;
devfn = PCI_DEVFN(func->device, func->function);
temp_byte = 0x40; /* hard coded value for LT */
if (card_type == PCI_HEADER_TYPE_BRIDGE) {
/* set subordinate Latency Timer */
rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SEC_LATENCY_TIMER, temp_byte);
if (rc) {
dbg("%s: set secondary LT error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__,
func->bus, func->device, func->function);
return rc;
}
}
/* set base Latency Timer */
rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_LATENCY_TIMER, temp_byte);
if (rc) {
dbg("%s: set LT error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus, func->device, func->function);
return rc;
}
/* set Cache Line size */
temp_byte = 0x08; /* hard coded value for CLS */
rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_CACHE_LINE_SIZE, temp_byte);
if (rc) {
dbg("%s: set CLS error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus, func->device, func->function);
}
/* set enable_perr */
/* set enable_serr */
return rc;
return;
}
void pciehprm_enable_card(
struct controller *ctrl,
struct pci_func *func,
u8 card_type)
{
u16 command, bcommand;
struct pci_bus lpci_bus, *pci_bus;
unsigned int devfn;
int rc;
memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
pci_bus = &lpci_bus;
pci_bus->number = func->bus;
devfn = PCI_DEVFN(func->device, func->function);
rc = pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &command);
command |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR
| PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE
| PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
rc = pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
if (card_type == PCI_HEADER_TYPE_BRIDGE) {
rc = pci_bus_read_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, &bcommand);
bcommand |= PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR
| PCI_BRIDGE_CTL_NO_ISA;
rc = pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, bcommand);
}
}
static int legacy_pciehprm_init_pci(void)
int get_hp_hw_control_from_firmware(struct pci_dev *dev)
{
return 0;
}
int pciehprm_init(enum php_ctlr_type ctrl_type)
{
int retval;
switch (ctrl_type) {
case PCI:
retval = legacy_pciehprm_init_pci();
break;
default:
retval = -ENODEV;
break;
}
return retval;
}

56
drivers/pci/hotplug/pciehprm_nonacpi.h
View file

@ -1,56 +0,0 @@
/*
* PCIEHPRM NONACPI: PHP Resource Manager for Non-ACPI/Legacy platform
*
* Copyright (C) 1995,2001 Compaq Computer Corporation
* Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
* Copyright (C) 2001 IBM Corp.
* Copyright (C) 2003-2004 Intel Corporation
*
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or (at
* your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for more
* details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*
* Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
*
*/
#ifndef _PCIEHPRM_NONACPI_H_
#define _PCIEHPRM_NONACPI_H_
struct irq_info {
u8 bus, devfn; /* bus, device and function */
struct {
u8 link; /* IRQ line ID, chipset dependent, 0=not routed */
u16 bitmap; /* Available IRQs */
} __attribute__ ((packed)) irq[4];
u8 slot; /* slot number, 0=onboard */
u8 rfu;
} __attribute__ ((packed));
struct irq_routing_table {
u32 signature; /* PIRQ_SIGNATURE should be here */
u16 version; /* PIRQ_VERSION */
u16 size; /* Table size in bytes */
u8 rtr_bus, rtr_devfn; /* Where the interrupt router lies */
u16 exclusive_irqs; /* IRQs devoted exclusively to PCI usage */
u16 rtr_vendor, rtr_device; /* Vendor and device ID of interrupt router */
u32 miniport_data; /* Crap */
u8 rfu[11];
u8 checksum; /* Modulo 256 checksum must give zero */
struct irq_info slots[0];
} __attribute__ ((packed));
#endif /* _PCIEHPRM_NONACPI_H_ */