mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-10-29 23:53:32 +00:00
Revert "staging: sm7xxfb: remove driver"
This reverts commit "dc93c85235efa5201e9a3c116bc3fbd1afc1a182" Signed-off-by: Sudip Mukherjee <sudip@vectorindia.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Sudip Mukherjee
Greg Kroah-Hartman
parent
5da41e9256
commit
a8e8f89dad
7 changed files with 1831 additions and 0 deletions
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@ -58,6 +58,8 @@ source "drivers/staging/vt6656/Kconfig"
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source "drivers/staging/iio/Kconfig"
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source "drivers/staging/iio/Kconfig"
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source "drivers/staging/sm7xxfb/Kconfig"
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source "drivers/staging/xgifb/Kconfig"
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source "drivers/staging/xgifb/Kconfig"
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source "drivers/staging/emxx_udc/Kconfig"
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source "drivers/staging/emxx_udc/Kconfig"
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@ -23,6 +23,7 @@ obj-$(CONFIG_VT6655) += vt6655/
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obj-$(CONFIG_VT6656) += vt6656/
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obj-$(CONFIG_VT6656) += vt6656/
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obj-$(CONFIG_VME_BUS) += vme/
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obj-$(CONFIG_VME_BUS) += vme/
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obj-$(CONFIG_IIO) += iio/
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obj-$(CONFIG_IIO) += iio/
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obj-$(CONFIG_FB_SM7XX) += sm7xxfb/
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obj-$(CONFIG_FB_XGI) += xgifb/
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obj-$(CONFIG_FB_XGI) += xgifb/
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obj-$(CONFIG_USB_EMXX) += emxx_udc/
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obj-$(CONFIG_USB_EMXX) += emxx_udc/
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obj-$(CONFIG_FT1000) += ft1000/
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obj-$(CONFIG_FT1000) += ft1000/
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13
drivers/staging/sm7xxfb/Kconfig
Normal file
13
drivers/staging/sm7xxfb/Kconfig
Normal file
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@ -0,0 +1,13 @@
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config FB_SM7XX
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tristate "Silicon Motion SM7XX framebuffer support"
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depends on FB && PCI
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select FB_CFB_FILLRECT
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select FB_CFB_COPYAREA
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select FB_CFB_IMAGEBLIT
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help
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Frame buffer driver for the Silicon Motion SM710, SM712, SM721
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and SM722 chips.
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This driver is also available as a module. The module will be
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called sm7xxfb. If you want to compile it as a module, say M
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here and read <file:Documentation/kbuild/modules.txt>.
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1
drivers/staging/sm7xxfb/Makefile
Normal file
1
drivers/staging/sm7xxfb/Makefile
Normal file
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@ -0,0 +1 @@
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obj-$(CONFIG_FB_SM7XX) += sm7xxfb.o
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9
drivers/staging/sm7xxfb/TODO
Normal file
9
drivers/staging/sm7xxfb/TODO
Normal file
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@ -0,0 +1,9 @@
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TODO:
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- Dual head support
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- 2D acceleration support
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- use kernel coding style
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- refine the code and remove unused code
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- move it to drivers/video/sm7xxfb.c
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Please send any patches to Greg Kroah-Hartman <greg@kroah.com> and
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Teddy Wang <teddy.wang@siliconmotion.com.cn>.
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779
drivers/staging/sm7xxfb/sm7xx.h
Normal file
779
drivers/staging/sm7xxfb/sm7xx.h
Normal file
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@ -0,0 +1,779 @@
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/*
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* Silicon Motion SM712 frame buffer device
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*
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* Copyright (C) 2006 Silicon Motion Technology Corp.
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* Authors: Ge Wang, gewang@siliconmotion.com
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* Boyod boyod.yang@siliconmotion.com.cn
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*
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* Copyright (C) 2009 Lemote, Inc.
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* Author: Wu Zhangjin, wuzhangjin@gmail.com
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive for
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* more details.
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*/
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#define NR_PALETTE 256
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#define FB_ACCEL_SMI_LYNX 88
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#define SCREEN_X_RES 1024
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#define SCREEN_Y_RES 600
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#define SCREEN_BPP 16
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/*Assume SM712 graphics chip has 4MB VRAM */
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#define SM712_VIDEOMEMORYSIZE 0x00400000
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/*Assume SM722 graphics chip has 8MB VRAM */
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#define SM722_VIDEOMEMORYSIZE 0x00800000
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#define dac_reg (0x3c8)
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#define dac_val (0x3c9)
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extern void __iomem *smtc_RegBaseAddress;
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#define smtc_mmiowb(dat, reg) writeb(dat, smtc_RegBaseAddress + reg)
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#define smtc_mmioww(dat, reg) writew(dat, smtc_RegBaseAddress + reg)
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#define smtc_mmiowl(dat, reg) writel(dat, smtc_RegBaseAddress + reg)
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#define smtc_mmiorb(reg) readb(smtc_RegBaseAddress + reg)
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#define smtc_mmiorw(reg) readw(smtc_RegBaseAddress + reg)
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#define smtc_mmiorl(reg) readl(smtc_RegBaseAddress + reg)
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#define SIZE_SR00_SR04 (0x04 - 0x00 + 1)
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#define SIZE_SR10_SR24 (0x24 - 0x10 + 1)
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#define SIZE_SR30_SR75 (0x75 - 0x30 + 1)
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#define SIZE_SR80_SR93 (0x93 - 0x80 + 1)
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#define SIZE_SRA0_SRAF (0xAF - 0xA0 + 1)
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#define SIZE_GR00_GR08 (0x08 - 0x00 + 1)
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#define SIZE_AR00_AR14 (0x14 - 0x00 + 1)
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#define SIZE_CR00_CR18 (0x18 - 0x00 + 1)
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#define SIZE_CR30_CR4D (0x4D - 0x30 + 1)
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#define SIZE_CR90_CRA7 (0xA7 - 0x90 + 1)
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#define SIZE_VPR (0x6C + 1)
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#define SIZE_DPR (0x44 + 1)
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static inline void smtc_crtcw(int reg, int val)
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{
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smtc_mmiowb(reg, 0x3d4);
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smtc_mmiowb(val, 0x3d5);
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}
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static inline unsigned int smtc_crtcr(int reg)
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{
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smtc_mmiowb(reg, 0x3d4);
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return smtc_mmiorb(0x3d5);
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}
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static inline void smtc_grphw(int reg, int val)
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{
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smtc_mmiowb(reg, 0x3ce);
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smtc_mmiowb(val, 0x3cf);
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}
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static inline unsigned int smtc_grphr(int reg)
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{
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smtc_mmiowb(reg, 0x3ce);
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return smtc_mmiorb(0x3cf);
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}
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static inline void smtc_attrw(int reg, int val)
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{
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smtc_mmiorb(0x3da);
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smtc_mmiowb(reg, 0x3c0);
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smtc_mmiorb(0x3c1);
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smtc_mmiowb(val, 0x3c0);
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}
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static inline void smtc_seqw(int reg, int val)
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{
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smtc_mmiowb(reg, 0x3c4);
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smtc_mmiowb(val, 0x3c5);
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}
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static inline unsigned int smtc_seqr(int reg)
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{
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smtc_mmiowb(reg, 0x3c4);
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return smtc_mmiorb(0x3c5);
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}
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/* The next structure holds all information relevant for a specific video mode.
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*/
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struct ModeInit {
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int mmSizeX;
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int mmSizeY;
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int bpp;
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int hz;
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unsigned char Init_MISC;
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unsigned char Init_SR00_SR04[SIZE_SR00_SR04];
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unsigned char Init_SR10_SR24[SIZE_SR10_SR24];
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unsigned char Init_SR30_SR75[SIZE_SR30_SR75];
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unsigned char Init_SR80_SR93[SIZE_SR80_SR93];
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unsigned char Init_SRA0_SRAF[SIZE_SRA0_SRAF];
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unsigned char Init_GR00_GR08[SIZE_GR00_GR08];
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unsigned char Init_AR00_AR14[SIZE_AR00_AR14];
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unsigned char Init_CR00_CR18[SIZE_CR00_CR18];
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unsigned char Init_CR30_CR4D[SIZE_CR30_CR4D];
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unsigned char Init_CR90_CRA7[SIZE_CR90_CRA7];
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};
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/**********************************************************************
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SM712 Mode table.
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**********************************************************************/
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struct ModeInit VGAMode[] = {
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{
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/* mode#0: 640 x 480 16Bpp 60Hz */
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640, 480, 16, 60,
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/* Init_MISC */
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0xE3,
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{ /* Init_SR0_SR4 */
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0x03, 0x01, 0x0F, 0x00, 0x0E,
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},
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{ /* Init_SR10_SR24 */
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0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
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0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0xC4, 0x30, 0x02, 0x01, 0x01,
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},
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{ /* Init_SR30_SR75 */
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0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
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0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
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0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
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0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
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0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
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0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
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0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
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0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
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0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
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},
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{ /* Init_SR80_SR93 */
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0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
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0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
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0x00, 0x00, 0x00, 0x00,
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},
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{ /* Init_SRA0_SRAF */
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0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
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0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
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},
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{ /* Init_GR00_GR08 */
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0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
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0xFF,
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},
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{ /* Init_AR00_AR14 */
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0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
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0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
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0x41, 0x00, 0x0F, 0x00, 0x00,
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},
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{ /* Init_CR00_CR18 */
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0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
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0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
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0xFF,
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},
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{ /* Init_CR30_CR4D */
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0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
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0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
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0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
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0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
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},
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{ /* Init_CR90_CRA7 */
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0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
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0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
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0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
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},
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},
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{
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/* mode#1: 640 x 480 24Bpp 60Hz */
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640, 480, 24, 60,
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/* Init_MISC */
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0xE3,
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{ /* Init_SR0_SR4 */
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0x03, 0x01, 0x0F, 0x00, 0x0E,
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},
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{ /* Init_SR10_SR24 */
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0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
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0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0xC4, 0x30, 0x02, 0x01, 0x01,
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},
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{ /* Init_SR30_SR75 */
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0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
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0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
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0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
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0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
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0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
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0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
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0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
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0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
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0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
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},
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{ /* Init_SR80_SR93 */
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0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
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0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
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0x00, 0x00, 0x00, 0x00,
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},
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{ /* Init_SRA0_SRAF */
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0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
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0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
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},
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{ /* Init_GR00_GR08 */
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0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
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0xFF,
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},
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||||||
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{ /* Init_AR00_AR14 */
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0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
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0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
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0x41, 0x00, 0x0F, 0x00, 0x00,
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},
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{ /* Init_CR00_CR18 */
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0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
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0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
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0xFF,
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},
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{ /* Init_CR30_CR4D */
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0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
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0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
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0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
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0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
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},
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{ /* Init_CR90_CRA7 */
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0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
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0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
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||||||
|
0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
|
||||||
|
},
|
||||||
|
},
|
||||||
|
{
|
||||||
|
/* mode#0: 640 x 480 32Bpp 60Hz */
|
||||||
|
640, 480, 32, 60,
|
||||||
|
/* Init_MISC */
|
||||||
|
0xE3,
|
||||||
|
{ /* Init_SR0_SR4 */
|
||||||
|
0x03, 0x01, 0x0F, 0x00, 0x0E,
|
||||||
|
},
|
||||||
|
{ /* Init_SR10_SR24 */
|
||||||
|
0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
|
||||||
|
0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||||
|
0xC4, 0x30, 0x02, 0x01, 0x01,
|
||||||
|
},
|
||||||
|
{ /* Init_SR30_SR75 */
|
||||||
|
0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
|
||||||
|
0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
|
||||||
|
0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
|
||||||
|
0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
|
||||||
|
0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
|
||||||
|
0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
|
||||||
|
0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
|
||||||
|
0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
|
||||||
|
0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
|
||||||
|
},
|
||||||
|
{ /* Init_SR80_SR93 */
|
||||||
|
0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
|
||||||
|
0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
|
||||||
|
0x00, 0x00, 0x00, 0x00,
|
||||||
|
},
|
||||||
|
{ /* Init_SRA0_SRAF */
|
||||||
|
0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
|
||||||
|
0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
|
||||||
|
},
|
||||||
|
{ /* Init_GR00_GR08 */
|
||||||
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
|
||||||
|
0xFF,
|
||||||
|
},
|
||||||
|
{ /* Init_AR00_AR14 */
|
||||||
|
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||||
|
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||||
|
0x41, 0x00, 0x0F, 0x00, 0x00,
|
||||||
|
},
|
||||||
|
{ /* Init_CR00_CR18 */
|
||||||
|
0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
|
||||||
|
0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||||
|
0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
|
||||||
|
0xFF,
|
||||||
|
},
|
||||||
|
{ /* Init_CR30_CR4D */
|
||||||
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
|
||||||
|
0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
|
||||||
|
0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
|
||||||
|
0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
|
||||||
|
},
|
||||||
|
{ /* Init_CR90_CRA7 */
|
||||||
|
0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
|
||||||
|
0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
|
||||||
|
0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
|
||||||
|
},
|
||||||
|
},
|
||||||
|
|
||||||
|
{ /* mode#2: 800 x 600 16Bpp 60Hz */
|
||||||
|
800, 600, 16, 60,
|
||||||
|
/* Init_MISC */
|
||||||
|
0x2B,
|
||||||
|
{ /* Init_SR0_SR4 */
|
||||||
|
0x03, 0x01, 0x0F, 0x03, 0x0E,
|
||||||
|
},
|
||||||
|
{ /* Init_SR10_SR24 */
|
||||||
|
0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
|
||||||
|
0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||||
|
0xC4, 0x30, 0x02, 0x01, 0x01,
|
||||||
|
},
|
||||||
|
{ /* Init_SR30_SR75 */
|
||||||
|
0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
|
||||||
|
0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
|
||||||
|
0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
|
||||||
|
0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
|
||||||
|
0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
|
||||||
|
0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
|
||||||
|
0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
|
||||||
|
0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
|
||||||
|
0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
|
||||||
|
},
|
||||||
|
{ /* Init_SR80_SR93 */
|
||||||
|
0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
|
||||||
|
0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
|
||||||
|
0x00, 0x00, 0x00, 0x00,
|
||||||
|
},
|
||||||
|
{ /* Init_SRA0_SRAF */
|
||||||
|
0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
|
||||||
|
0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
|
||||||
|
},
|
||||||
|
{ /* Init_GR00_GR08 */
|
||||||
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
|
||||||
|
0xFF,
|
||||||
|
},
|
||||||
|
{ /* Init_AR00_AR14 */
|
||||||
|
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||||
|
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||||
|
0x41, 0x00, 0x0F, 0x00, 0x00,
|
||||||
|
},
|
||||||
|
{ /* Init_CR00_CR18 */
|
||||||
|
0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
|
||||||
|
0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||||
|
0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
|
||||||
|
0xFF,
|
||||||
|
},
|
||||||
|
{ /* Init_CR30_CR4D */
|
||||||
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
|
||||||
|
0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
|
||||||
|
0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
|
||||||
|
0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
|
||||||
|
},
|
||||||
|
{ /* Init_CR90_CRA7 */
|
||||||
|
0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
|
||||||
|
0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
|
||||||
|
0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
|
||||||
|
},
|
||||||
|
},
|
||||||
|
{ /* mode#3: 800 x 600 24Bpp 60Hz */
|
||||||
|
800, 600, 24, 60,
|
||||||
|
0x2B,
|
||||||
|
{ /* Init_SR0_SR4 */
|
||||||
|
0x03, 0x01, 0x0F, 0x03, 0x0E,
|
||||||
|
},
|
||||||
|
{ /* Init_SR10_SR24 */
|
||||||
|
0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
|
||||||
|
0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||||
|
0xC4, 0x30, 0x02, 0x01, 0x01,
|
||||||
|
},
|
||||||
|
{ /* Init_SR30_SR75 */
|
||||||
|
0x36, 0x03, 0x20, 0x09, 0xC0, 0x36, 0x36, 0x36,
|
||||||
|
0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x03, 0xFF,
|
||||||
|
0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
|
||||||
|
0x20, 0x0C, 0x44, 0x20, 0x00, 0x36, 0x36, 0x36,
|
||||||
|
0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
|
||||||
|
0x04, 0x55, 0x59, 0x36, 0x36, 0x00, 0x00, 0x36,
|
||||||
|
0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
|
||||||
|
0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
|
||||||
|
0x02, 0x45, 0x30, 0x30, 0x40, 0x20,
|
||||||
|
},
|
||||||
|
{ /* Init_SR80_SR93 */
|
||||||
|
0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x36,
|
||||||
|
0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x36, 0x36,
|
||||||
|
0x00, 0x00, 0x00, 0x00,
|
||||||
|
},
|
||||||
|
{ /* Init_SRA0_SRAF */
|
||||||
|
0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
|
||||||
|
0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
|
||||||
|
},
|
||||||
|
{ /* Init_GR00_GR08 */
|
||||||
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
|
||||||
|
0xFF,
|
||||||
|
},
|
||||||
|
{ /* Init_AR00_AR14 */
|
||||||
|
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||||
|
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||||
|
0x41, 0x00, 0x0F, 0x00, 0x00,
|
||||||
|
},
|
||||||
|
{ /* Init_CR00_CR18 */
|
||||||
|
0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
|
||||||
|
0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||||
|
0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
|
||||||
|
0xFF,
|
||||||
|
},
|
||||||
|
{ /* Init_CR30_CR4D */
|
||||||
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
|
||||||
|
0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
|
||||||
|
0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
|
||||||
|
0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
|
||||||
|
},
|
||||||
|
{ /* Init_CR90_CRA7 */
|
||||||
|
0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
|
||||||
|
0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
|
||||||
|
0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
|
||||||
|
},
|
||||||
|
},
|
||||||
|
{ /* mode#7: 800 x 600 32Bpp 60Hz */
|
||||||
|
800, 600, 32, 60,
|
||||||
|
/* Init_MISC */
|
||||||
|
0x2B,
|
||||||
|
{ /* Init_SR0_SR4 */
|
||||||
|
0x03, 0x01, 0x0F, 0x03, 0x0E,
|
||||||
|
},
|
||||||
|
{ /* Init_SR10_SR24 */
|
||||||
|
0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
|
||||||
|
0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||||
|
0xC4, 0x30, 0x02, 0x01, 0x01,
|
||||||
|
},
|
||||||
|
{ /* Init_SR30_SR75 */
|
||||||
|
0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
|
||||||
|
0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
|
||||||
|
0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
|
||||||
|
0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
|
||||||
|
0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
|
||||||
|
0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
|
||||||
|
0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
|
||||||
|
0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
|
||||||
|
0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
|
||||||
|
},
|
||||||
|
{ /* Init_SR80_SR93 */
|
||||||
|
0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
|
||||||
|
0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
|
||||||
|
0x00, 0x00, 0x00, 0x00,
|
||||||
|
},
|
||||||
|
{ /* Init_SRA0_SRAF */
|
||||||
|
0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
|
||||||
|
0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
|
||||||
|
},
|
||||||
|
{ /* Init_GR00_GR08 */
|
||||||
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
|
||||||
|
0xFF,
|
||||||
|
},
|
||||||
|
{ /* Init_AR00_AR14 */
|
||||||
|
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||||
|
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||||
|
0x41, 0x00, 0x0F, 0x00, 0x00,
|
||||||
|
},
|
||||||
|
{ /* Init_CR00_CR18 */
|
||||||
|
0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
|
||||||
|
0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||||
|
0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
|
||||||
|
0xFF,
|
||||||
|
},
|
||||||
|
{ /* Init_CR30_CR4D */
|
||||||
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
|
||||||
|
0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
|
||||||
|
0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
|
||||||
|
0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
|
||||||
|
},
|
||||||
|
{ /* Init_CR90_CRA7 */
|
||||||
|
0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
|
||||||
|
0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
|
||||||
|
0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
|
||||||
|
},
|
||||||
|
},
|
||||||
|
/* We use 1024x768 table to light 1024x600 panel for lemote */
|
||||||
|
{ /* mode#4: 1024 x 600 16Bpp 60Hz */
|
||||||
|
1024, 600, 16, 60,
|
||||||
|
/* Init_MISC */
|
||||||
|
0xEB,
|
||||||
|
{ /* Init_SR0_SR4 */
|
||||||
|
0x03, 0x01, 0x0F, 0x00, 0x0E,
|
||||||
|
},
|
||||||
|
{ /* Init_SR10_SR24 */
|
||||||
|
0xC8, 0x40, 0x14, 0x60, 0x00, 0x0A, 0x17, 0x20,
|
||||||
|
0x51, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||||
|
0xC4, 0x30, 0x02, 0x00, 0x01,
|
||||||
|
},
|
||||||
|
{ /* Init_SR30_SR75 */
|
||||||
|
0x22, 0x03, 0x24, 0x09, 0xC0, 0x22, 0x22, 0x22,
|
||||||
|
0x22, 0x22, 0x22, 0x22, 0x00, 0x00, 0x03, 0xFF,
|
||||||
|
0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
|
||||||
|
0x20, 0x0C, 0x44, 0x20, 0x00, 0x22, 0x22, 0x22,
|
||||||
|
0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
|
||||||
|
0x00, 0x60, 0x59, 0x22, 0x22, 0x00, 0x00, 0x22,
|
||||||
|
0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
|
||||||
|
0x50, 0x03, 0x16, 0x02, 0x0D, 0x82, 0x09, 0x02,
|
||||||
|
0x04, 0x45, 0x3F, 0x30, 0x40, 0x20,
|
||||||
|
},
|
||||||
|
{ /* Init_SR80_SR93 */
|
||||||
|
0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
|
||||||
|
0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
|
||||||
|
0x00, 0x00, 0x00, 0x00,
|
||||||
|
},
|
||||||
|
{ /* Init_SRA0_SRAF */
|
||||||
|
0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
|
||||||
|
0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
|
||||||
|
},
|
||||||
|
{ /* Init_GR00_GR08 */
|
||||||
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
|
||||||
|
0xFF,
|
||||||
|
},
|
||||||
|
{ /* Init_AR00_AR14 */
|
||||||
|
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||||
|
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||||
|
0x41, 0x00, 0x0F, 0x00, 0x00,
|
||||||
|
},
|
||||||
|
{ /* Init_CR00_CR18 */
|
||||||
|
0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
|
||||||
|
0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||||
|
0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
|
||||||
|
0xFF,
|
||||||
|
},
|
||||||
|
{ /* Init_CR30_CR4D */
|
||||||
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
|
||||||
|
0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
|
||||||
|
0xA3, 0x7F, 0x00, 0x82, 0x0b, 0x6f, 0x57, 0x00,
|
||||||
|
0x5c, 0x0f, 0xE0, 0xe0, 0x7F, 0x57,
|
||||||
|
},
|
||||||
|
{ /* Init_CR90_CRA7 */
|
||||||
|
0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
|
||||||
|
0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
|
||||||
|
0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
|
||||||
|
},
|
||||||
|
},
|
||||||
|
{ /* mode#5: 1024 x 768 24Bpp 60Hz */
|
||||||
|
1024, 768, 24, 60,
|
||||||
|
/* Init_MISC */
|
||||||
|
0xEB,
|
||||||
|
{ /* Init_SR0_SR4 */
|
||||||
|
0x03, 0x01, 0x0F, 0x03, 0x0E,
|
||||||
|
},
|
||||||
|
{ /* Init_SR10_SR24 */
|
||||||
|
0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
|
||||||
|
0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||||
|
0xC4, 0x30, 0x02, 0x01, 0x01,
|
||||||
|
},
|
||||||
|
{ /* Init_SR30_SR75 */
|
||||||
|
0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
|
||||||
|
0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
|
||||||
|
0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
|
||||||
|
0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
|
||||||
|
0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
|
||||||
|
0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
|
||||||
|
0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
|
||||||
|
0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
|
||||||
|
0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
|
||||||
|
},
|
||||||
|
{ /* Init_SR80_SR93 */
|
||||||
|
0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
|
||||||
|
0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
|
||||||
|
0x00, 0x00, 0x00, 0x00,
|
||||||
|
},
|
||||||
|
{ /* Init_SRA0_SRAF */
|
||||||
|
0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
|
||||||
|
0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
|
||||||
|
},
|
||||||
|
{ /* Init_GR00_GR08 */
|
||||||
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
|
||||||
|
0xFF,
|
||||||
|
},
|
||||||
|
{ /* Init_AR00_AR14 */
|
||||||
|
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||||
|
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||||
|
0x41, 0x00, 0x0F, 0x00, 0x00,
|
||||||
|
},
|
||||||
|
{ /* Init_CR00_CR18 */
|
||||||
|
0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
|
||||||
|
0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||||
|
0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
|
||||||
|
0xFF,
|
||||||
|
},
|
||||||
|
{ /* Init_CR30_CR4D */
|
||||||
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
|
||||||
|
0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
|
||||||
|
0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
|
||||||
|
0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
|
||||||
|
},
|
||||||
|
{ /* Init_CR90_CRA7 */
|
||||||
|
0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
|
||||||
|
0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
|
||||||
|
0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
|
||||||
|
},
|
||||||
|
},
|
||||||
|
{ /* mode#4: 1024 x 768 32Bpp 60Hz */
|
||||||
|
1024, 768, 32, 60,
|
||||||
|
/* Init_MISC */
|
||||||
|
0xEB,
|
||||||
|
{ /* Init_SR0_SR4 */
|
||||||
|
0x03, 0x01, 0x0F, 0x03, 0x0E,
|
||||||
|
},
|
||||||
|
{ /* Init_SR10_SR24 */
|
||||||
|
0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
|
||||||
|
0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||||
|
0xC4, 0x32, 0x02, 0x01, 0x01,
|
||||||
|
},
|
||||||
|
{ /* Init_SR30_SR75 */
|
||||||
|
0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
|
||||||
|
0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
|
||||||
|
0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
|
||||||
|
0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
|
||||||
|
0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
|
||||||
|
0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
|
||||||
|
0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
|
||||||
|
0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
|
||||||
|
0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
|
||||||
|
},
|
||||||
|
{ /* Init_SR80_SR93 */
|
||||||
|
0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
|
||||||
|
0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
|
||||||
|
0x00, 0x00, 0x00, 0x00,
|
||||||
|
},
|
||||||
|
{ /* Init_SRA0_SRAF */
|
||||||
|
0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
|
||||||
|
0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
|
||||||
|
},
|
||||||
|
{ /* Init_GR00_GR08 */
|
||||||
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
|
||||||
|
0xFF,
|
||||||
|
},
|
||||||
|
{ /* Init_AR00_AR14 */
|
||||||
|
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||||
|
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||||
|
0x41, 0x00, 0x0F, 0x00, 0x00,
|
||||||
|
},
|
||||||
|
{ /* Init_CR00_CR18 */
|
||||||
|
0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
|
||||||
|
0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||||
|
0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
|
||||||
|
0xFF,
|
||||||
|
},
|
||||||
|
{ /* Init_CR30_CR4D */
|
||||||
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
|
||||||
|
0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
|
||||||
|
0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
|
||||||
|
0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
|
||||||
|
},
|
||||||
|
{ /* Init_CR90_CRA7 */
|
||||||
|
0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
|
||||||
|
0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
|
||||||
|
0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
|
||||||
|
},
|
||||||
|
},
|
||||||
|
{ /* mode#6: 320 x 240 16Bpp 60Hz */
|
||||||
|
320, 240, 16, 60,
|
||||||
|
/* Init_MISC */
|
||||||
|
0xEB,
|
||||||
|
{ /* Init_SR0_SR4 */
|
||||||
|
0x03, 0x01, 0x0F, 0x03, 0x0E,
|
||||||
|
},
|
||||||
|
{ /* Init_SR10_SR24 */
|
||||||
|
0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
|
||||||
|
0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||||
|
0xC4, 0x32, 0x02, 0x01, 0x01,
|
||||||
|
},
|
||||||
|
{ /* Init_SR30_SR75 */
|
||||||
|
0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
|
||||||
|
0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
|
||||||
|
0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
|
||||||
|
0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
|
||||||
|
0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
|
||||||
|
0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
|
||||||
|
0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
|
||||||
|
0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
|
||||||
|
0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
|
||||||
|
},
|
||||||
|
{ /* Init_SR80_SR93 */
|
||||||
|
0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
|
||||||
|
0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
|
||||||
|
0x00, 0x00, 0x00, 0x00,
|
||||||
|
},
|
||||||
|
{ /* Init_SRA0_SRAF */
|
||||||
|
0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
|
||||||
|
0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
|
||||||
|
},
|
||||||
|
{ /* Init_GR00_GR08 */
|
||||||
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
|
||||||
|
0xFF,
|
||||||
|
},
|
||||||
|
{ /* Init_AR00_AR14 */
|
||||||
|
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||||
|
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||||
|
0x41, 0x00, 0x0F, 0x00, 0x00,
|
||||||
|
},
|
||||||
|
{ /* Init_CR00_CR18 */
|
||||||
|
0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
|
||||||
|
0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||||
|
0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
|
||||||
|
0xFF,
|
||||||
|
},
|
||||||
|
{ /* Init_CR30_CR4D */
|
||||||
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
|
||||||
|
0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
|
||||||
|
0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
|
||||||
|
0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
|
||||||
|
},
|
||||||
|
{ /* Init_CR90_CRA7 */
|
||||||
|
0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
|
||||||
|
0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
|
||||||
|
0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
|
||||||
|
},
|
||||||
|
},
|
||||||
|
|
||||||
|
{ /* mode#8: 320 x 240 32Bpp 60Hz */
|
||||||
|
320, 240, 32, 60,
|
||||||
|
/* Init_MISC */
|
||||||
|
0xEB,
|
||||||
|
{ /* Init_SR0_SR4 */
|
||||||
|
0x03, 0x01, 0x0F, 0x03, 0x0E,
|
||||||
|
},
|
||||||
|
{ /* Init_SR10_SR24 */
|
||||||
|
0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
|
||||||
|
0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||||
|
0xC4, 0x32, 0x02, 0x01, 0x01,
|
||||||
|
},
|
||||||
|
{ /* Init_SR30_SR75 */
|
||||||
|
0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
|
||||||
|
0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
|
||||||
|
0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
|
||||||
|
0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
|
||||||
|
0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
|
||||||
|
0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
|
||||||
|
0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
|
||||||
|
0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
|
||||||
|
0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
|
||||||
|
},
|
||||||
|
{ /* Init_SR80_SR93 */
|
||||||
|
0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
|
||||||
|
0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
|
||||||
|
0x00, 0x00, 0x00, 0x00,
|
||||||
|
},
|
||||||
|
{ /* Init_SRA0_SRAF */
|
||||||
|
0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
|
||||||
|
0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
|
||||||
|
},
|
||||||
|
{ /* Init_GR00_GR08 */
|
||||||
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
|
||||||
|
0xFF,
|
||||||
|
},
|
||||||
|
{ /* Init_AR00_AR14 */
|
||||||
|
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||||
|
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||||
|
0x41, 0x00, 0x0F, 0x00, 0x00,
|
||||||
|
},
|
||||||
|
{ /* Init_CR00_CR18 */
|
||||||
|
0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
|
||||||
|
0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||||
|
0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
|
||||||
|
0xFF,
|
||||||
|
},
|
||||||
|
{ /* Init_CR30_CR4D */
|
||||||
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
|
||||||
|
0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
|
||||||
|
0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
|
||||||
|
0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
|
||||||
|
},
|
||||||
|
{ /* Init_CR90_CRA7 */
|
||||||
|
0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
|
||||||
|
0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
|
||||||
|
0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
|
||||||
|
},
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
|
#define numVGAModes ARRAY_SIZE(VGAMode)
|
||||||
1026
drivers/staging/sm7xxfb/sm7xxfb.c
Normal file
1026
drivers/staging/sm7xxfb/sm7xxfb.c
Normal file
File diff suppressed because it is too large
Load diff
Loading…
Reference in a new issue