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gpu: ipu-v3: initially clear all interrupts
If we want to stop resetting the IPU in the future, masking all interrupts before registering the irq handlers will not be enough to avoid spurious interrupts. We also have to clear them. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Liu Ying <gnuiyl@gmail.com>
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@ -1286,8 +1286,11 @@ static int ipu_irq_init(struct ipu_soc *ipu)
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return ret;
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}
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for (i = 0; i < IPU_NUM_IRQS; i += 32)
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/* Mask and clear all interrupts */
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for (i = 0; i < IPU_NUM_IRQS; i += 32) {
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ipu_cm_write(ipu, 0, IPU_INT_CTRL(i / 32));
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ipu_cm_write(ipu, ~unused[i / 32], IPU_INT_STAT(i / 32));
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}
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for (i = 0; i < IPU_NUM_IRQS; i += 32) {
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gc = irq_get_domain_generic_chip(ipu->domain, i);
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