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synced 2024-09-13 14:14:37 +00:00
drm/exynos: Use mode_set to configure fimd
This patch uses the mode passed into mode_set to configure fimd instead of directly using the panel from context. This will allow us to move the exynos_drm_display implementation out of fimd, where it doesn't belong. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Inki Dae <inki.dae@samsung.com>
This commit is contained in:
Sean Paul
Inki Dae
parent
4b4052699a
commit
a968e72771
1 changed files with 74 additions and 69 deletions
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@ -112,8 +112,8 @@ struct fimd_context {
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struct clk *bus_clk;
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struct clk *lcd_clk;
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void __iomem *regs;
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struct drm_display_mode mode;
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struct fimd_win_data win_data[WINDOWS_NR];
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unsigned int clkdiv;
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unsigned int default_win;
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unsigned long irq_flags;
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u32 vidcon0;
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@ -221,38 +221,82 @@ static void fimd_mgr_remove(struct exynos_drm_manager *mgr)
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drm_iommu_detach_device(ctx->drm_dev, ctx->dev);
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}
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static u32 fimd_calc_clkdiv(struct fimd_context *ctx,
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const struct drm_display_mode *mode)
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{
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unsigned long ideal_clk = mode->htotal * mode->vtotal * mode->vrefresh;
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u32 clkdiv;
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/* Find the clock divider value that gets us closest to ideal_clk */
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clkdiv = DIV_ROUND_UP(clk_get_rate(ctx->lcd_clk), ideal_clk);
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return (clkdiv < 0x100) ? clkdiv : 0xff;
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}
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static bool fimd_mode_fixup(struct exynos_drm_manager *mgr,
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const struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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if (adjusted_mode->vrefresh == 0)
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adjusted_mode->vrefresh = FIMD_DEFAULT_FRAMERATE;
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return true;
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}
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static void fimd_mode_set(struct exynos_drm_manager *mgr,
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const struct drm_display_mode *in_mode)
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{
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struct fimd_context *ctx = mgr->ctx;
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drm_mode_copy(&ctx->mode, in_mode);
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}
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static void fimd_commit(struct exynos_drm_manager *mgr)
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{
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struct fimd_context *ctx = mgr->ctx;
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struct exynos_drm_panel_info *panel = &ctx->panel;
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struct videomode *vm = &panel->vm;
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struct drm_display_mode *mode = &ctx->mode;
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struct fimd_driver_data *driver_data;
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u32 val;
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u32 val, clkdiv;
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int hblank, vblank, vsync_len, vbpd, vfpd, hsync_len, hbpd, hfpd;
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driver_data = ctx->driver_data;
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if (ctx->suspended)
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return;
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/* nothing to do if we haven't set the mode yet */
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if (mode->htotal == 0 || mode->vtotal == 0)
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return;
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/* setup polarity values from machine code. */
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writel(ctx->vidcon1, ctx->regs + driver_data->timing_base + VIDCON1);
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/* setup vertical timing values. */
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val = VIDTCON0_VBPD(vm->vback_porch - 1) |
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VIDTCON0_VFPD(vm->vfront_porch - 1) |
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VIDTCON0_VSPW(vm->vsync_len - 1);
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vblank = mode->crtc_vblank_end - mode->crtc_vblank_start;
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vsync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
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vbpd = (vblank - vsync_len) / 2;
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vfpd = vblank - vsync_len - vbpd;
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val = VIDTCON0_VBPD(vbpd - 1) |
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VIDTCON0_VFPD(vfpd - 1) |
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VIDTCON0_VSPW(vsync_len - 1);
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writel(val, ctx->regs + driver_data->timing_base + VIDTCON0);
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/* setup horizontal timing values. */
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val = VIDTCON1_HBPD(vm->hback_porch - 1) |
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VIDTCON1_HFPD(vm->hfront_porch - 1) |
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VIDTCON1_HSPW(vm->hsync_len - 1);
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hblank = mode->crtc_hblank_end - mode->crtc_hblank_start;
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hsync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
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hbpd = (hblank - hsync_len) / 2;
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hfpd = hblank - hsync_len - hbpd;
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val = VIDTCON1_HBPD(hbpd - 1) |
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VIDTCON1_HFPD(hfpd - 1) |
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VIDTCON1_HSPW(hsync_len - 1);
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writel(val, ctx->regs + driver_data->timing_base + VIDTCON1);
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/* setup horizontal and vertical display size. */
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val = VIDTCON2_LINEVAL(vm->vactive - 1) |
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VIDTCON2_HOZVAL(vm->hactive - 1) |
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VIDTCON2_LINEVAL_E(vm->vactive - 1) |
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VIDTCON2_HOZVAL_E(vm->hactive - 1);
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val = VIDTCON2_LINEVAL(mode->vdisplay - 1) |
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VIDTCON2_HOZVAL(mode->hdisplay - 1) |
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VIDTCON2_LINEVAL_E(mode->vdisplay - 1) |
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VIDTCON2_HOZVAL_E(mode->hdisplay - 1);
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writel(val, ctx->regs + driver_data->timing_base + VIDTCON2);
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/* setup clock source, clock divider, enable dma. */
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@ -264,8 +308,9 @@ static void fimd_commit(struct exynos_drm_manager *mgr)
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val |= VIDCON0_CLKSEL_LCD;
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}
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if (ctx->clkdiv > 1)
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val |= VIDCON0_CLKVAL_F(ctx->clkdiv - 1) | VIDCON0_CLKDIR;
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clkdiv = fimd_calc_clkdiv(ctx, mode);
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if (clkdiv > 1)
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val |= VIDCON0_CLKVAL_F(clkdiv - 1) | VIDCON0_CLKDIR;
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else
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val &= ~VIDCON0_CLKDIR; /* 1:1 clock */
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@ -683,6 +728,8 @@ static struct exynos_drm_manager_ops fimd_manager_ops = {
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.initialize = fimd_mgr_initialize,
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.remove = fimd_mgr_remove,
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.dpms = fimd_dpms,
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.mode_fixup = fimd_mode_fixup,
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.mode_set = fimd_mode_set,
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.commit = fimd_commit,
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.enable_vblank = fimd_enable_vblank,
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.disable_vblank = fimd_disable_vblank,
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@ -724,56 +771,6 @@ static irqreturn_t fimd_irq_handler(int irq, void *dev_id)
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return IRQ_HANDLED;
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}
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static int fimd_configure_clocks(struct fimd_context *ctx, struct device *dev)
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{
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struct videomode *vm = &ctx->panel.vm;
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unsigned long clk;
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ctx->bus_clk = devm_clk_get(dev, "fimd");
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if (IS_ERR(ctx->bus_clk)) {
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dev_err(dev, "failed to get bus clock\n");
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return PTR_ERR(ctx->bus_clk);
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}
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ctx->lcd_clk = devm_clk_get(dev, "sclk_fimd");
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if (IS_ERR(ctx->lcd_clk)) {
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dev_err(dev, "failed to get lcd clock\n");
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return PTR_ERR(ctx->lcd_clk);
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}
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clk = clk_get_rate(ctx->lcd_clk);
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if (clk == 0) {
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dev_err(dev, "error getting sclk_fimd clock rate\n");
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return -EINVAL;
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}
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if (vm->pixelclock == 0) {
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unsigned long c;
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c = vm->hactive + vm->hback_porch + vm->hfront_porch +
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vm->hsync_len;
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c *= vm->vactive + vm->vback_porch + vm->vfront_porch +
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vm->vsync_len;
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vm->pixelclock = c * FIMD_DEFAULT_FRAMERATE;
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if (vm->pixelclock == 0) {
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dev_err(dev, "incorrect display timings\n");
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return -EINVAL;
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}
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dev_warn(dev, "pixel clock recalculated to %luHz (%dHz frame rate)\n",
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vm->pixelclock, FIMD_DEFAULT_FRAMERATE);
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}
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ctx->clkdiv = DIV_ROUND_UP(clk, vm->pixelclock);
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if (ctx->clkdiv > 256) {
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dev_warn(dev, "calculated pixel clock divider too high (%u), lowered to 256\n",
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ctx->clkdiv);
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ctx->clkdiv = 256;
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}
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vm->pixelclock = clk / ctx->clkdiv;
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DRM_DEBUG_KMS("pixel clock = %lu, clkdiv = %d\n", vm->pixelclock,
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ctx->clkdiv);
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return 0;
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}
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static void fimd_clear_win(struct fimd_context *ctx, int win)
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{
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writel(0, ctx->regs + WINCON(win));
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@ -926,9 +923,17 @@ static int fimd_probe(struct platform_device *pdev)
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if (ret)
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return ret;
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ret = fimd_configure_clocks(ctx, dev);
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if (ret)
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return ret;
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ctx->bus_clk = devm_clk_get(dev, "fimd");
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if (IS_ERR(ctx->bus_clk)) {
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dev_err(dev, "failed to get bus clock\n");
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return PTR_ERR(ctx->bus_clk);
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}
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ctx->lcd_clk = devm_clk_get(dev, "sclk_fimd");
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if (IS_ERR(ctx->lcd_clk)) {
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dev_err(dev, "failed to get lcd clock\n");
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return PTR_ERR(ctx->lcd_clk);
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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