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ARM fixes for 5.13:

Browse source 
- fix gcc 10 compiler regression with cpu_init()
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEuNNh8scc2k/wOAE+9OeQG+StrGQFAmDQtuEACgkQ9OeQG+St
 rGRQDxAAhrHvJSAERsTLehvG1RgklwWAOvIQUogILXucMwYBP2BiQxMCA8WMpyO/
 UM1ZWO08EMEwzILXdm5Fhi806lcRkbtr6IGzKJR01MtHctG2eywo0QJGTNZmt53j
 U2tQuNAuhTTd1N14eybZsAdgWmGCKgtBmhvW5alSoFB6jt94YQ8ZXcg+bzHvJ/i9
 8NdCleBv6oyLceMPW0j8iiMChKxxi/r267MVZUCu4VCc7geLU2Vf8buI5l8jbT5w
 8vR/tbHomlUwXfiCrBwmYE7YYt/dJMXUSMFPUpn+sj3c+gA28lfEPKNLe9JpI+r3
 Mow0usg8jJu0n8wyAc/AKnhLK/zBiB7Jcmj9Ue0Bf8h7cosSZt/OVfYzA+bBDMar
 v78/rQv9g4VcBtYjMvzkDBzGUGdvdDtGdl2ghJgYlNI6nVAf5bvIyMKkUUciFB7m
 6Jdy+EWIOSvqS72prpCh+2sSIS4tcCNiW0sPMhSeM5pu1VlCUTB8u6s5h8sp1+3h
 ZO4n5hcGO1lhTnJzLavufEeu5V6Kw33isKP5ZQ7L+s3cblzJuRmh0DVPqq0WI7bh
 mnP0BbcuVJANo+yrfQGos3XD4gZ19IWxSyu8ks0yJtFm2h+W1aXecrxQXk9t+EXh
 k+mWLAf00wEkaHvvGTuICswsj5aAKj0sLoIySXQPiFtZN1Nyn2I=
 =f79T
 -----END PGP SIGNATURE-----

Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm

Pull ARM fix from Russell King:

 - fix gcc 10 compiler regression with cpu_init()

* tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm:
  ARM: 9081/1: fix gcc-10 thumb2-kernel regression
This commit is contained in:
Linus Torvalds 2021-06-21 09:49:48 -07:00
commit a96bfed64c
1 changed files with 9 additions and 7 deletions
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16
arch/arm/kernel/setup.c
View file

@ -545,9 +545,11 @@ void notrace cpu_init(void)
* In Thumb-2, msr with an immediate value is not allowed.
*/
#ifdef CONFIG_THUMB2_KERNEL
#define PLC "r"
#define PLC_l "l"
#define PLC_r "r"
#else
#define PLC "I"
#define PLC_l "I"
#define PLC_r "I"
#endif
/*
@ -569,15 +571,15 @@ void notrace cpu_init(void)
"msr cpsr_c, %9"
:
: "r" (stk),
PLC (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
PLC_r (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
"I" (offsetof(struct stack, irq[0])),
PLC (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
PLC_r (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
"I" (offsetof(struct stack, abt[0])),
PLC (PSR_F_BIT | PSR_I_BIT | UND_MODE),
PLC_r (PSR_F_BIT | PSR_I_BIT | UND_MODE),
"I" (offsetof(struct stack, und[0])),
PLC (PSR_F_BIT | PSR_I_BIT | FIQ_MODE),
PLC_r (PSR_F_BIT | PSR_I_BIT | FIQ_MODE),
"I" (offsetof(struct stack, fiq[0])),
PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
PLC_l (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
: "r14");
#endif
}