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PCI updates for v4.5:
Enumeration Revert x86 pcibios_alloc_irq() to fix regression (Bjorn Helgaas) Marvell MVEBU host bridge driver Restrict build to 32-bit ARM (Thierry Reding) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJW0gP1AAoJEFmIoMA60/r84qkQAJXOFW20cie2yepQXIk7f5aN M2/+iFte8YHf4ZFgZWA/oS+mZAp1OqctSTjWg1KTPZsPHAiB6DkL7WOV6fK+uXr9 fX8D7Ec2eLgeIFl78iSQaAht4kfmfz8f5LlU6Oi9kvQOt+35gp4lP834HClx7Jep XT2qZy/zUQy8GylTzRqueMBpXBCnBQR8iyaD8j4rmklQB3yLXaEMTs7HzwJKBmhM ZDnH1xrV5cWYb7niSCBkq4IomCmezJZCvxcDjh/Z8gjDKbVl7TLYOdU8Jh4wNO++ ng0J8WDSKQJ9Hfv6H+5dgPzoqgrIrWb/Oz5GXd8i6cqv00szG5S/w8nHcO8LPSJv dJxxfTlz4KRxdv/sqOVW4cDFUmScODMkDMh+hAeEVYKl9ty5fQ4O2iNwNehzrdNj FRrgN1980amYN2n09NZNF863dvVN+DMJ4Ll2VT01rOIUH3bwt4cO6rVWrEUlEKCn DiSvJlXHm5nLLCQpkkGKAeq5hYl25DFtYVwLopIbUSHFXCASHPtQewDvgzfn9zYi M7J8bDa/uTscSqJsGsb4/gHLEblCfju7Pj2gEHoiK4XtbCuuamFA3nsA7lzcAG9j W5pVDQTqctdgHq/UMLKIeoBJ592fhYzKipY8vELOKwkieDR9F3g3u8nWt4ZAUIXE /oS5F1eWMkDMvdjyZO4C =yQ41 -----END PGP SIGNATURE----- Merge tag 'pci-v4.5-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI fixes from Bjorn Helgaas: "Enumeration: Revert x86 pcibios_alloc_irq() to fix regression (Bjorn Helgaas) Marvell MVEBU host bridge driver: Restrict build to 32-bit ARM (Thierry Reding)" * tag 'pci-v4.5-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: PCI: mvebu: Restrict build to 32-bit ARM Revert "PCI, x86: Implement pcibios_alloc_irq() and pcibios_free_irq()" Revert "PCI: Add helpers to manage pci_dev->irq and pci_dev->irq_managed" Revert "x86/PCI: Don't alloc pcibios-irq when MSI is enabled"
This commit is contained in:
commit
a9f8094aae
7 changed files with 52 additions and 51 deletions
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@ -93,6 +93,8 @@ extern raw_spinlock_t pci_config_lock;
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extern int (*pcibios_enable_irq)(struct pci_dev *dev);
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extern void (*pcibios_disable_irq)(struct pci_dev *dev);
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extern bool mp_should_keep_irq(struct device *dev);
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struct pci_raw_ops {
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int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,
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int reg, int len, u32 *val);
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@ -711,28 +711,22 @@ int pcibios_add_device(struct pci_dev *dev)
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return 0;
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}
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int pcibios_alloc_irq(struct pci_dev *dev)
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{
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/*
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* If the PCI device was already claimed by core code and has
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* MSI enabled, probing of the pcibios IRQ will overwrite
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* dev->irq. So bail out if MSI is already enabled.
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*/
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if (pci_dev_msi_enabled(dev))
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return -EBUSY;
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return pcibios_enable_irq(dev);
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}
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void pcibios_free_irq(struct pci_dev *dev)
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{
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if (pcibios_disable_irq)
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pcibios_disable_irq(dev);
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}
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int pcibios_enable_device(struct pci_dev *dev, int mask)
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{
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return pci_enable_resources(dev, mask);
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int err;
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if ((err = pci_enable_resources(dev, mask)) < 0)
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return err;
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if (!pci_dev_msi_enabled(dev))
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return pcibios_enable_irq(dev);
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return 0;
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}
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void pcibios_disable_device (struct pci_dev *dev)
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{
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if (!pci_dev_msi_enabled(dev) && pcibios_disable_irq)
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pcibios_disable_irq(dev);
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}
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int pci_ext_cfg_avail(void)
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@ -215,7 +215,7 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
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int polarity;
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int ret;
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if (pci_has_managed_irq(dev))
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if (dev->irq_managed && dev->irq > 0)
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return 0;
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switch (intel_mid_identify_cpu()) {
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@ -256,13 +256,10 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
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static void intel_mid_pci_irq_disable(struct pci_dev *dev)
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{
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if (pci_has_managed_irq(dev)) {
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if (!mp_should_keep_irq(&dev->dev) && dev->irq_managed &&
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dev->irq > 0) {
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mp_unmap_irq(dev->irq);
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dev->irq_managed = 0;
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/*
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* Don't reset dev->irq here, otherwise
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* intel_mid_pci_irq_enable() will fail on next call.
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*/
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}
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}
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@ -1202,7 +1202,7 @@ static int pirq_enable_irq(struct pci_dev *dev)
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struct pci_dev *temp_dev;
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int irq;
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if (pci_has_managed_irq(dev))
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if (dev->irq_managed && dev->irq > 0)
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return 0;
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irq = IO_APIC_get_PCI_irq_vector(dev->bus->number,
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@ -1230,7 +1230,8 @@ static int pirq_enable_irq(struct pci_dev *dev)
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}
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dev = temp_dev;
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if (irq >= 0) {
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pci_set_managed_irq(dev, irq);
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dev->irq_managed = 1;
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dev->irq = irq;
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dev_info(&dev->dev, "PCI->APIC IRQ transform: "
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"INT %c -> IRQ %d\n", 'A' + pin - 1, irq);
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return 0;
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@ -1256,10 +1257,24 @@ static int pirq_enable_irq(struct pci_dev *dev)
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return 0;
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}
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bool mp_should_keep_irq(struct device *dev)
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{
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if (dev->power.is_prepared)
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return true;
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#ifdef CONFIG_PM
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if (dev->power.runtime_status == RPM_SUSPENDING)
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return true;
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#endif
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return false;
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}
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static void pirq_disable_irq(struct pci_dev *dev)
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{
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if (io_apic_assign_pci_irqs && pci_has_managed_irq(dev)) {
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if (io_apic_assign_pci_irqs && !mp_should_keep_irq(&dev->dev) &&
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dev->irq_managed && dev->irq) {
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mp_unmap_irq(dev->irq);
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pci_reset_managed_irq(dev);
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dev->irq = 0;
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dev->irq_managed = 0;
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}
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}
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@ -406,7 +406,7 @@ int acpi_pci_irq_enable(struct pci_dev *dev)
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return 0;
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}
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if (pci_has_managed_irq(dev))
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if (dev->irq_managed && dev->irq > 0)
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return 0;
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entry = acpi_pci_irq_lookup(dev, pin);
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@ -451,7 +451,8 @@ int acpi_pci_irq_enable(struct pci_dev *dev)
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kfree(entry);
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return rc;
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}
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pci_set_managed_irq(dev, rc);
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dev->irq = rc;
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dev->irq_managed = 1;
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if (link)
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snprintf(link_desc, sizeof(link_desc), " -> Link[%s]", link);
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@ -474,9 +475,17 @@ void acpi_pci_irq_disable(struct pci_dev *dev)
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u8 pin;
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pin = dev->pin;
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if (!pin || !pci_has_managed_irq(dev))
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if (!pin || !dev->irq_managed || dev->irq <= 0)
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return;
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/* Keep IOAPIC pin configuration when suspending */
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if (dev->dev.power.is_prepared)
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return;
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#ifdef CONFIG_PM
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if (dev->dev.power.runtime_status == RPM_SUSPENDING)
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return;
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#endif
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entry = acpi_pci_irq_lookup(dev, pin);
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if (!entry)
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return;
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@ -496,6 +505,6 @@ void acpi_pci_irq_disable(struct pci_dev *dev)
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dev_dbg(&dev->dev, "PCI INT %c disabled\n", pin_name(pin));
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if (gsi >= 0) {
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acpi_unregister_gsi(gsi);
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pci_reset_managed_irq(dev);
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dev->irq_managed = 0;
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}
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}
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@ -14,6 +14,7 @@ config PCI_DRA7XX
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config PCI_MVEBU
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bool "Marvell EBU PCIe controller"
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depends on ARCH_MVEBU || ARCH_DOVE
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depends on ARM
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depends on OF
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config PCIE_DW
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@ -988,23 +988,6 @@ static inline int pci_is_managed(struct pci_dev *pdev)
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return pdev->is_managed;
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}
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static inline void pci_set_managed_irq(struct pci_dev *pdev, unsigned int irq)
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{
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pdev->irq = irq;
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pdev->irq_managed = 1;
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}
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static inline void pci_reset_managed_irq(struct pci_dev *pdev)
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{
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pdev->irq = 0;
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pdev->irq_managed = 0;
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}
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static inline bool pci_has_managed_irq(struct pci_dev *pdev)
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{
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return pdev->irq_managed && pdev->irq > 0;
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}
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void pci_disable_device(struct pci_dev *dev);
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extern unsigned int pcibios_max_latency;
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