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drm/amdgpu: validate size and offset of user fence BO
We need to validate the offset to make sure that we don't write after the BO. Additional to that a page should be enough and can make address space handling much easier. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1 changed files with 6 additions and 0 deletions
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@ -91,6 +91,7 @@ static int amdgpu_cs_user_fence_chunk(struct amdgpu_cs_parser *p,
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uint32_t *offset)
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{
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struct drm_gem_object *gobj;
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unsigned long size;
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gobj = drm_gem_object_lookup(p->filp, data->handle);
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if (gobj == NULL)
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@ -101,6 +102,11 @@ static int amdgpu_cs_user_fence_chunk(struct amdgpu_cs_parser *p,
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p->uf_entry.tv.bo = &p->uf_entry.robj->tbo;
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p->uf_entry.tv.shared = true;
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p->uf_entry.user_pages = NULL;
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size = amdgpu_bo_size(p->uf_entry.robj);
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if (size != PAGE_SIZE || (data->offset + 8) > size)
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return -EINVAL;
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*offset = data->offset;
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drm_gem_object_unreference_unlocked(gobj);
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