arm64: dts: mt8192: Add H264 venc device node

Adds H264 venc node for mt8192 SoC.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220330133816.30806-4-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Allen-KH Cheng 2022-03-30 21:38:15 +08:00 committed by Matthias Brugger
parent e530d08093
commit aa8f3711fc

View file

@ -1145,6 +1145,29 @@ larb7: larb@17010000 {
power-domains = <&spm MT8192_POWER_DOMAIN_VENC>;
};
vcodec_enc: vcodec@17020000 {
compatible = "mediatek,mt8192-vcodec-enc";
reg = <0 0x17020000 0 0x2000>;
iommus = <&iommu0 M4U_PORT_L7_VENC_RCPU>,
<&iommu0 M4U_PORT_L7_VENC_REC>,
<&iommu0 M4U_PORT_L7_VENC_BSDMA>,
<&iommu0 M4U_PORT_L7_VENC_SV_COMV>,
<&iommu0 M4U_PORT_L7_VENC_RD_COMV>,
<&iommu0 M4U_PORT_L7_VENC_CUR_LUMA>,
<&iommu0 M4U_PORT_L7_VENC_CUR_CHROMA>,
<&iommu0 M4U_PORT_L7_VENC_REF_LUMA>,
<&iommu0 M4U_PORT_L7_VENC_REF_CHROMA>,
<&iommu0 M4U_PORT_L7_VENC_SUB_R_LUMA>,
<&iommu0 M4U_PORT_L7_VENC_SUB_W_LUMA>;
interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 0>;
mediatek,scp = <&scp>;
power-domains = <&spm MT8192_POWER_DOMAIN_VENC>;
clocks = <&vencsys CLK_VENC_SET1_VENC>;
clock-names = "venc-set1";
assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>;
};
camsys: clock-controller@1a000000 {
compatible = "mediatek,mt8192-camsys";
reg = <0 0x1a000000 0 0x1000>;