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spi: spi-mxs: Clean up setup_transfer function
It can't be called with a NULL transfer anymore so it can be simplified to not check for that. Fix indention of line-wrapped code to Linux standard. The transfer pointer can be const. It's not necessary to check if the spi_transfer's speed_hz is zero, as the spi core also fills it in from the spi_device. However, the spi core does not check if spi_device's speed is zero so we have to do that still. Signed-off-by: Trent Piepho <tpiepho@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>
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parent
d426eadb1e
commit
aa9e0c6feb
1 changed files with 8 additions and 11 deletions
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@ -70,17 +70,14 @@ struct mxs_spi {
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};
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};
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static int mxs_spi_setup_transfer(struct spi_device *dev,
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static int mxs_spi_setup_transfer(struct spi_device *dev,
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struct spi_transfer *t)
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const struct spi_transfer *t)
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{
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{
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struct mxs_spi *spi = spi_master_get_devdata(dev->master);
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struct mxs_spi *spi = spi_master_get_devdata(dev->master);
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struct mxs_ssp *ssp = &spi->ssp;
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struct mxs_ssp *ssp = &spi->ssp;
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uint32_t hz = 0;
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const unsigned int hz = min(dev->max_speed_hz, t->speed_hz);
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hz = dev->max_speed_hz;
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if (t && t->speed_hz)
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hz = min(hz, t->speed_hz);
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if (hz == 0) {
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if (hz == 0) {
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dev_err(&dev->dev, "Cannot continue with zero clock\n");
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dev_err(&dev->dev, "SPI clock rate of zero not allowed\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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@ -88,12 +85,12 @@ static int mxs_spi_setup_transfer(struct spi_device *dev,
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writel(BM_SSP_CTRL0_LOCK_CS,
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writel(BM_SSP_CTRL0_LOCK_CS,
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ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
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ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
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writel(BF_SSP_CTRL1_SSP_MODE(BV_SSP_CTRL1_SSP_MODE__SPI) |
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writel(BF_SSP_CTRL1_SSP_MODE(BV_SSP_CTRL1_SSP_MODE__SPI) |
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BF_SSP_CTRL1_WORD_LENGTH
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BF_SSP_CTRL1_WORD_LENGTH(BV_SSP_CTRL1_WORD_LENGTH__EIGHT_BITS) |
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(BV_SSP_CTRL1_WORD_LENGTH__EIGHT_BITS) |
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((dev->mode & SPI_CPOL) ? BM_SSP_CTRL1_POLARITY : 0) |
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((dev->mode & SPI_CPOL) ? BM_SSP_CTRL1_POLARITY : 0) |
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((dev->mode & SPI_CPHA) ? BM_SSP_CTRL1_PHASE : 0),
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((dev->mode & SPI_CPHA) ? BM_SSP_CTRL1_PHASE : 0),
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ssp->base + HW_SSP_CTRL1(ssp));
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ssp->base + HW_SSP_CTRL1(ssp));
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writel(0x0, ssp->base + HW_SSP_CMD0);
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writel(0x0, ssp->base + HW_SSP_CMD0);
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writel(0x0, ssp->base + HW_SSP_CMD1);
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writel(0x0, ssp->base + HW_SSP_CMD1);
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