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dt-bindings: mmc: Add bindings for Intel Thunder Bay SoC
Add documentation for Arasan SDHCI controller in Thunder Bay SOC. Signed-off-by: Rashmi A <rashmi.a@intel.com> Link: https://lore.kernel.org/r/20210829182443.30802-3-rashmi.a@intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -88,6 +88,12 @@ properties:
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description:
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For this device it is strongly suggested to include
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arasan,soc-ctl-syscon.
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- items:
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- const: intel,thunderbay-sdhci-5.1 # Intel Thunder Bay eMMC PHY
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- const: arasan,sdhci-5.1
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description:
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For this device it is strongly suggested to include
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clock-output-names and '#clock-cells'.
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reg:
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maxItems: 1
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@ -301,3 +307,22 @@ examples:
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<&scmi_clk KEEM_BAY_PSS_SD0>;
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arasan,soc-ctl-syscon = <&sd0_phy_syscon>;
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};
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- |
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#define EMMC_XIN_CLK
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#define EMMC_AXI_CLK
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#define TBH_PSS_EMMC_RST_N
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mmc@80420000 {
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compatible = "intel,thunderbay-sdhci-5.1", "arasan,sdhci-5.1";
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interrupts = <GIC_SPI 714 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x80420000 0x400>;
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clocks = <&scmi_clk EMMC_XIN_CLK>,
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<&scmi_clk EMMC_AXI_CLK>;
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clock-names = "clk_xin", "clk_ahb";
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phys = <&emmc_phy>;
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phy-names = "phy_arasan";
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assigned-clocks = <&scmi_clk EMMC_XIN_CLK>;
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clock-output-names = "emmc_cardclock";
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resets = <&rst_pss1 TBH_PSS_EMMC_RST_N>;
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#clock-cells = <0x0>;
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};
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