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arm64: dts: uniphier: add ethernet node for PXs3

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Add nodes of the AVE ethernet controller for PXs3 and the boards.
This SoC has two controllers.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Kunihiko Hayashi 2018-03-27 19:32:46 +09:00 committed by Masahiro Yamada
parent 9ca6129d00
commit aba054a1cd
2 changed files with 58 additions and 0 deletions
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22
arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
View file

@ -75,6 +75,28 @@ &i2c3 {
status = "okay";
};
&eth0 {
status = "okay";
phy-handle = <&ethphy0>;
};
&mdio0 {
ethphy0: ethphy@0 {
reg = <0>;
};
};
&eth1 {
status = "okay";
phy-handle = <&ethphy1>;
};
&mdio1 {
ethphy1: ethphy@0 {
reg = <0>;
};
};
&nand {
status = "okay";
};

36
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
View file

@ -405,6 +405,42 @@ watchdog {
};
};
eth0: ethernet@65000000 {
compatible = "socionext,uniphier-pxs3-ave4";
status = "disabled";
reg = <0x65000000 0x8500>;
interrupts = <0 66 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether_rgmii>;
clocks = <&sys_clk 6>;
resets = <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
mdio0: mdio {
#address-cells = <1>;
#size-cells = <0>;
};
};
eth1: ethernet@65200000 {
compatible = "socionext,uniphier-pxs3-ave4";
status = "disabled";
reg = <0x65200000 0x8500>;
interrupts = <0 67 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether1_rgmii>;
clocks = <&sys_clk 7>;
resets = <&sys_rst 7>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
mdio1: mdio {
#address-cells = <1>;
#size-cells = <0>;
};
};
nand: nand@68000000 {
compatible = "socionext,uniphier-denali-nand-v5b";
status = "disabled";