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iio: mxs-lradc: add write_raw function to modify scale
Added write_raw function to manipulate the optional divider_by_two through the scaling attribute out of the available scales. Signed-off-by: Hector Palacios <hector.palacios@digi.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
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1 changed files with 61 additions and 1 deletions
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@ -185,6 +185,11 @@ enum lradc_ts_plate {
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LRADC_SAMPLE_VALID,
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LRADC_SAMPLE_VALID,
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};
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};
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enum mxs_lradc_divbytwo {
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MXS_LRADC_DIV_DISABLED = 0,
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MXS_LRADC_DIV_ENABLED,
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};
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struct mxs_lradc_scale {
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struct mxs_lradc_scale {
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unsigned int integer;
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unsigned int integer;
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unsigned int nano;
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unsigned int nano;
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@ -206,6 +211,7 @@ struct mxs_lradc {
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const uint32_t *vref_mv;
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const uint32_t *vref_mv;
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struct mxs_lradc_scale scale_avail[LRADC_MAX_TOTAL_CHANS][2];
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struct mxs_lradc_scale scale_avail[LRADC_MAX_TOTAL_CHANS][2];
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unsigned int is_divided[LRADC_MAX_TOTAL_CHANS];
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/*
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/*
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* Touchscreen LRADC channels receives a private slot in the CTRL4
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* Touchscreen LRADC channels receives a private slot in the CTRL4
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@ -295,6 +301,7 @@ struct mxs_lradc {
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#define LRADC_CTRL1_LRADC_IRQ_OFFSET 0
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#define LRADC_CTRL1_LRADC_IRQ_OFFSET 0
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#define LRADC_CTRL2 0x20
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#define LRADC_CTRL2 0x20
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#define LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET 24
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#define LRADC_CTRL2_TEMPSENSE_PWD (1 << 15)
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#define LRADC_CTRL2_TEMPSENSE_PWD (1 << 15)
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#define LRADC_STATUS 0x40
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#define LRADC_STATUS 0x40
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@ -912,7 +919,8 @@ static int mxs_lradc_read_raw(struct iio_dev *iio_dev,
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}
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}
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*val = lradc->vref_mv[chan->channel];
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*val = lradc->vref_mv[chan->channel];
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*val2 = chan->scan_type.realbits;
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*val2 = chan->scan_type.realbits -
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lradc->is_divided[chan->channel];
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return IIO_VAL_FRACTIONAL_LOG2;
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return IIO_VAL_FRACTIONAL_LOG2;
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case IIO_CHAN_INFO_OFFSET:
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case IIO_CHAN_INFO_OFFSET:
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@ -936,6 +944,56 @@ static int mxs_lradc_read_raw(struct iio_dev *iio_dev,
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return -EINVAL;
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return -EINVAL;
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}
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}
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static int mxs_lradc_write_raw(struct iio_dev *iio_dev,
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const struct iio_chan_spec *chan,
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int val, int val2, long m)
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{
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struct mxs_lradc *lradc = iio_priv(iio_dev);
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struct mxs_lradc_scale *scale_avail =
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lradc->scale_avail[chan->channel];
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int ret;
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ret = mutex_trylock(&lradc->lock);
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if (!ret)
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return -EBUSY;
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switch (m) {
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case IIO_CHAN_INFO_SCALE:
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ret = -EINVAL;
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if (val == scale_avail[MXS_LRADC_DIV_DISABLED].integer &&
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val2 == scale_avail[MXS_LRADC_DIV_DISABLED].nano) {
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/* divider by two disabled */
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writel(1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,
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lradc->base + LRADC_CTRL2 + STMP_OFFSET_REG_CLR);
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lradc->is_divided[chan->channel] = 0;
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ret = 0;
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} else if (val == scale_avail[MXS_LRADC_DIV_ENABLED].integer &&
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val2 == scale_avail[MXS_LRADC_DIV_ENABLED].nano) {
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/* divider by two enabled */
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writel(1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,
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lradc->base + LRADC_CTRL2 + STMP_OFFSET_REG_SET);
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lradc->is_divided[chan->channel] = 1;
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ret = 0;
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}
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break;
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default:
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ret = -EINVAL;
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break;
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}
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mutex_unlock(&lradc->lock);
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return ret;
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}
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static int mxs_lradc_write_raw_get_fmt(struct iio_dev *iio_dev,
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const struct iio_chan_spec *chan,
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long m)
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{
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return IIO_VAL_INT_PLUS_NANO;
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}
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static ssize_t mxs_lradc_show_scale_available_ch(struct device *dev,
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static ssize_t mxs_lradc_show_scale_available_ch(struct device *dev,
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struct device_attribute *attr,
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struct device_attribute *attr,
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char *buf,
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char *buf,
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@ -1013,6 +1071,8 @@ static const struct attribute_group mxs_lradc_attribute_group = {
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static const struct iio_info mxs_lradc_iio_info = {
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static const struct iio_info mxs_lradc_iio_info = {
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.driver_module = THIS_MODULE,
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.driver_module = THIS_MODULE,
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.read_raw = mxs_lradc_read_raw,
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.read_raw = mxs_lradc_read_raw,
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.write_raw = mxs_lradc_write_raw,
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.write_raw_get_fmt = mxs_lradc_write_raw_get_fmt,
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.attrs = &mxs_lradc_attribute_group,
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.attrs = &mxs_lradc_attribute_group,
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};
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};
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