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drm/bridge: tc358767: explicitly set readable registers
This map was created from register map from datasheet (section 5.1.2). Unused registers are stated by address, so they show up in debugfs as well. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230516071949.375264-1-alexander.stein@ew.tq-group.com
This commit is contained in:
Alexander Stein
Neil Armstrong
parent
90d63a150b
commit
abd686b8c3
1 changed files with 194 additions and 1 deletions
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@ -1781,7 +1781,200 @@ static const struct drm_bridge_funcs tc_edp_bridge_funcs = {
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static bool tc_readable_reg(struct device *dev, unsigned int reg)
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{
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return reg != SYSCTRL;
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switch (reg) {
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/* DSI D-PHY Layer */
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case 0x004:
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case 0x020:
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case 0x024:
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case 0x028:
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case 0x02c:
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case 0x030:
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case 0x038:
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case 0x040:
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case 0x044:
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case 0x048:
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case 0x04c:
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case 0x050:
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case 0x054:
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/* DSI PPI Layer */
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case PPI_STARTPPI:
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case 0x108:
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case 0x110:
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case PPI_LPTXTIMECNT:
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case PPI_LANEENABLE:
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case PPI_TX_RX_TA:
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case 0x140:
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case PPI_D0S_ATMR:
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case PPI_D1S_ATMR:
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case 0x14c:
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case 0x150:
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case PPI_D0S_CLRSIPOCOUNT:
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case PPI_D1S_CLRSIPOCOUNT:
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case PPI_D2S_CLRSIPOCOUNT:
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case PPI_D3S_CLRSIPOCOUNT:
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case 0x180:
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case 0x184:
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case 0x188:
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case 0x18c:
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case 0x190:
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case 0x1a0:
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case 0x1a4:
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case 0x1a8:
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case 0x1ac:
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case 0x1b0:
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case 0x1c0:
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case 0x1c4:
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case 0x1c8:
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case 0x1cc:
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case 0x1d0:
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case 0x1e0:
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case 0x1e4:
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case 0x1f0:
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case 0x1f4:
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/* DSI Protocol Layer */
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case DSI_STARTDSI:
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case 0x208:
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case DSI_LANEENABLE:
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case 0x214:
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case 0x218:
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case 0x220:
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case 0x224:
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case 0x228:
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case 0x230:
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/* DSI General */
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case 0x300:
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/* DSI Application Layer */
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case 0x400:
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case 0x404:
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/* DPI */
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case DPIPXLFMT:
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/* Parallel Output */
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case POCTRL:
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/* Video Path0 Configuration */
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case VPCTRL0:
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case HTIM01:
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case HTIM02:
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case VTIM01:
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case VTIM02:
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case VFUEN0:
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/* System */
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case TC_IDREG:
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case 0x504:
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case SYSSTAT:
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case SYSRSTENB:
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case SYSCTRL:
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/* I2C */
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case 0x520:
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/* GPIO */
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case GPIOM:
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case GPIOC:
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case GPIOO:
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case GPIOI:
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/* Interrupt */
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case INTCTL_G:
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case INTSTS_G:
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case 0x570:
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case 0x574:
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case INT_GP0_LCNT:
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case INT_GP1_LCNT:
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/* DisplayPort Control */
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case DP0CTL:
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/* DisplayPort Clock */
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case DP0_VIDMNGEN0:
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case DP0_VIDMNGEN1:
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case DP0_VMNGENSTATUS:
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case 0x628:
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case 0x62c:
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case 0x630:
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/* DisplayPort Main Channel */
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case DP0_SECSAMPLE:
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case DP0_VIDSYNCDELAY:
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case DP0_TOTALVAL:
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case DP0_STARTVAL:
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case DP0_ACTIVEVAL:
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case DP0_SYNCVAL:
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case DP0_MISC:
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/* DisplayPort Aux Channel */
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case DP0_AUXCFG0:
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case DP0_AUXCFG1:
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case DP0_AUXADDR:
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case 0x66c:
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case 0x670:
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case 0x674:
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case 0x678:
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case 0x67c:
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case 0x680:
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case 0x684:
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case 0x688:
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case DP0_AUXSTATUS:
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case DP0_AUXI2CADR:
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/* DisplayPort Link Training */
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case DP0_SRCCTRL:
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case DP0_LTSTAT:
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case DP0_SNKLTCHGREQ:
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case DP0_LTLOOPCTRL:
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case DP0_SNKLTCTRL:
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case 0x6e8:
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case 0x6ec:
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case 0x6f0:
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case 0x6f4:
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/* DisplayPort Audio */
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case 0x700:
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case 0x704:
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case 0x708:
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case 0x70c:
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case 0x710:
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case 0x714:
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case 0x718:
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case 0x71c:
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case 0x720:
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/* DisplayPort Source Control */
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case DP1_SRCCTRL:
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/* DisplayPort PHY */
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case DP_PHY_CTRL:
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case 0x810:
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case 0x814:
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case 0x820:
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case 0x840:
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/* I2S */
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case 0x880:
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case 0x888:
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case 0x88c:
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case 0x890:
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case 0x894:
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case 0x898:
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case 0x89c:
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case 0x8a0:
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case 0x8a4:
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case 0x8a8:
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case 0x8ac:
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case 0x8b0:
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case 0x8b4:
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/* PLL */
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case DP0_PLLCTRL:
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case DP1_PLLCTRL:
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case PXL_PLLCTRL:
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case PXL_PLLPARAM:
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case SYS_PLLPARAM:
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/* HDCP */
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case 0x980:
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case 0x984:
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case 0x988:
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case 0x98c:
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case 0x990:
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case 0x994:
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case 0x998:
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case 0x99c:
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case 0x9a0:
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case 0x9a4:
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case 0x9a8:
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case 0x9ac:
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/* Debug */
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case TSTCTL:
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case PLL_DBG:
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return true;
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}
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return false;
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}
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static const struct regmap_range tc_volatile_ranges[] = {
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