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ARM: dts: Kill off skeleton{64}.dtsi 

Remove the usage of skeleton.dtsi in the remaining dts files. It was
deprecated since commit 9c0da3cc61 ("ARM: dts: explicitly mark
skeleton.dtsi as deprecated"). This will make adding a unit-address to
memory nodes easier.

The main tricky part to removing skeleton.dtsi is we could end up with
no /memory node at all when a bootloader depends on one being present. I
hacked up dtc to check for this condition.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Antoine Tenart <antoine.tenart@bootlin.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Tested-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Rob Herring 2019-01-09 10:26:14 -06:00 committed by Arnd Bergmann
parent 6569df3d62
commit abe60a3a7a
141 changed files with 309 additions and 141 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm/boot/dts/alphascale-asm9260.dtsi
View File

@ -4,10 +4,11 @@
* Licensed under the X11 license or the GPL v2 (or later)
*/
#include "skeleton.dtsi"
#include <dt-bindings/clock/alphascale,asm9260.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&icoll>;
memory {

8
arch/arm/boot/dts/alpine.dtsi
View File

@ -25,12 +25,18 @@
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton64.dtsi"
/ {
#address-cells = <2>;
#size-cells = <2>;
/* SOC compatibility */
compatible = "al,alpine";
memory {
device_type = "memory";
reg = <0 0 0 0>;
};
/* CPU Configuration */
cpus {
#address-cells = <1>;

4
arch/arm/boot/dts/arm-realview-eb.dtsi
View File

@ -22,9 +22,10 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "arm,realview-eb";
chosen { };
@ -38,6 +39,7 @@
};
memory {
device_type = "memory";
/* 128 MiB memory @ 0x0 */
reg = <0x00000000 0x08000000>;
};

4
arch/arm/boot/dts/arm-realview-pb1176.dts
View File

@ -23,9 +23,10 @@
/dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "ARM RealView PB1176";
compatible = "arm,realview-pb1176";
@ -40,6 +41,7 @@
};
memory {
device_type = "memory";
/* 128 MiB memory @ 0x0 */
reg = <0x00000000 0x08000000>;
};

4
arch/arm/boot/dts/arm-realview-pb11mp.dts
View File

@ -23,9 +23,10 @@
/dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "ARM RealView PB11MPcore";
compatible = "arm,realview-pb11mp";
@ -39,6 +40,7 @@
};
memory {
device_type = "memory";
/*
* The PB11MPCore has 512 MiB memory @ 0x70000000
* and the first 256 are also remapped @ 0x00000000

4
arch/arm/boot/dts/arm-realview-pbx.dtsi
View File

@ -22,9 +22,10 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "arm,realview-pbx";
chosen { };
@ -39,6 +40,7 @@
};
memory {
device_type = "memory";
/* 128 MiB memory @ 0x0 */
reg = <0x00000000 0x08000000>;
};

4
arch/arm/boot/dts/armada-38x.dtsi
View File

@ -9,13 +9,15 @@
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
*/
#include "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "Marvell Armada 38x family SoC";
compatible = "marvell,armada380";

3
arch/arm/boot/dts/armada-39x.dtsi
View File

@ -7,13 +7,14 @@
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
*/
#include "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "Marvell Armada 39x family SoC";
compatible = "marvell,armada390";

3
arch/arm/boot/dts/artpec6.dtsi
View File

@ -43,9 +43,10 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/dma/nbpfaxi.h>
#include <dt-bindings/clock/axis,artpec6-clkctrl.h>
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "axis,artpec6";
interrupt-parent = <&intc>;

4
arch/arm/boot/dts/at91rm9200.dtsi
View File

@ -10,13 +10,14 @@
* Licensed under GPLv2 or later.
*/
#include "skeleton.dtsi"
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/at91.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "Atmel AT91RM9200 family SoC";
compatible = "atmel,at91rm9200";
interrupt-parent = <&aic>;
@ -49,6 +50,7 @@
};
memory {
device_type = "memory";
reg = <0x20000000 0x04000000>;
};

4
arch/arm/boot/dts/at91sam9260.dtsi
View File

@ -8,13 +8,14 @@
* Licensed under GPLv2 or later.
*/
#include "skeleton.dtsi"
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/at91.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "Atmel AT91SAM9260 family SoC";
compatible = "atmel,at91sam9260";
interrupt-parent = <&aic>;
@ -46,6 +47,7 @@
};
memory {
device_type = "memory";
reg = <0x20000000 0x04000000>;
};

4
arch/arm/boot/dts/at91sam9261.dtsi
View File

@ -6,13 +6,14 @@
* Licensed under GPLv2 only.
*/
#include "skeleton.dtsi"
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/at91.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "Atmel AT91SAM9261 family SoC";
compatible = "atmel,at91sam9261";
interrupt-parent = <&aic>;
@ -43,6 +44,7 @@
};
memory {
device_type = "memory";
reg = <0x20000000 0x08000000>;
};

4
arch/arm/boot/dts/at91sam9263.dtsi
View File

@ -6,13 +6,14 @@
* Licensed under GPLv2 only.
*/
#include "skeleton.dtsi"
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/at91.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "Atmel AT91SAM9263 family SoC";
compatible = "atmel,at91sam9263";
interrupt-parent = <&aic>;
@ -45,6 +46,7 @@
};
memory {
device_type = "memory";
reg = <0x20000000 0x08000000>;
};

4
arch/arm/boot/dts/at91sam9g45.dtsi
View File

@ -9,7 +9,6 @@
* Licensed under GPLv2 or later.
*/
#include "skeleton.dtsi"
#include <dt-bindings/dma/at91.h>
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
@ -17,6 +16,8 @@
#include <dt-bindings/clock/at91.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "Atmel AT91SAM9G45 family SoC";
compatible = "atmel,at91sam9g45";
interrupt-parent = <&aic>;
@ -51,6 +52,7 @@
};
memory {
device_type = "memory";
reg = <0x70000000 0x10000000>;
};

4
arch/arm/boot/dts/at91sam9n12.dtsi
View File

@ -7,7 +7,6 @@
* Licensed under GPLv2 or later.
*/
#include "skeleton.dtsi"
#include <dt-bindings/dma/at91.h>
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
@ -15,6 +14,8 @@
#include <dt-bindings/clock/at91.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "Atmel AT91SAM9N12 SoC";
compatible = "atmel,at91sam9n12";
interrupt-parent = <&aic>;
@ -47,6 +48,7 @@
};
memory {
device_type = "memory";
reg = <0x20000000 0x10000000>;
};

4
arch/arm/boot/dts/at91sam9rl.dtsi
View File

@ -7,7 +7,6 @@
* Licensed under GPLv2 or later.
*/
#include "skeleton.dtsi"
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/clock/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
@ -15,6 +14,8 @@
#include <dt-bindings/pwm/pwm.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "Atmel AT91SAM9RL family SoC";
compatible = "atmel,at91sam9rl", "atmel,at91sam9";
interrupt-parent = <&aic>;
@ -48,6 +49,7 @@
};
memory {
device_type = "memory";
reg = <0x20000000 0x04000000>;
};

4
arch/arm/boot/dts/at91sam9x5.dtsi
View File

@ -9,7 +9,6 @@
* Licensed under GPLv2 or later.
*/
#include "skeleton.dtsi"
#include <dt-bindings/dma/at91.h>
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
@ -17,6 +16,8 @@
#include <dt-bindings/clock/at91.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "Atmel AT91SAM9x5 family SoC";
compatible = "atmel,at91sam9x5";
interrupt-parent = <&aic>;
@ -49,6 +50,7 @@
};
memory {
device_type = "memory";
reg = <0x20000000 0x10000000>;
};

1
arch/arm/boot/dts/atlas6-evb.dts
View File

@ -15,6 +15,7 @@
compatible = "sirf,atlas6-cb", "sirf,atlas6";
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>;
};

1
arch/arm/boot/dts/atlas6.dtsi
View File

@ -6,7 +6,6 @@
* Licensed under GPLv2 or later.
*/
/include/ "skeleton.dtsi"
/ {
compatible = "sirf,atlas6";
#address-cells = <1>;

1
arch/arm/boot/dts/atlas7.dtsi
View File

@ -6,7 +6,6 @@
* Licensed under GPLv2 or later.
*/
/include/ "skeleton.dtsi"
/ {
compatible = "sirf,atlas7";
#address-cells = <1>;

4
arch/arm/boot/dts/axm55xx.dtsi
View File

@ -12,9 +12,9 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/lsi,axm5516-clks.h>
#include "skeleton64.dtsi"
/ {
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&gic>;
aliases {

9
arch/arm/boot/dts/bcm-cygnus.dtsi
View File

@ -34,9 +34,9 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/bcm-cygnus.h>
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "brcm,cygnus";
model = "Broadcom Cygnus SoC";
interrupt-parent = <&gic>;
@ -45,6 +45,11 @@
ethernet0 = &eth0;
};
memory {
device_type = "memory";
reg = <0 0>;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;

4
arch/arm/boot/dts/bcm-nsp.dtsi
View File

@ -34,9 +34,9 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/bcm-nsp.h>
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "brcm,nsp";
model = "Broadcom Northstar Plus SoC";
interrupt-parent = <&gic>;

4
arch/arm/boot/dts/bcm11351.dtsi
View File

@ -16,9 +16,9 @@
#include "dt-bindings/clock/bcm281xx.h"
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "BCM11351 SoC";
compatible = "brcm,bcm11351";
interrupt-parent = <&gic>;

1
arch/arm/boot/dts/bcm21664-garnet.dts
View File

@ -22,6 +22,7 @@
compatible = "brcm,bcm21664-garnet", "brcm,bcm21664";
memory {
device_type = "memory";
reg = <0x80000000 0x40000000>; /* 1 GB */
};

4
arch/arm/boot/dts/bcm21664.dtsi
View File

@ -16,9 +16,9 @@
#include "dt-bindings/clock/bcm21664.h"
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "BCM21664 SoC";
compatible = "brcm,bcm21664";
interrupt-parent = <&gic>;

1
arch/arm/boot/dts/bcm23550-sparrow.dts
View File

@ -46,6 +46,7 @@
};
memory {
device_type = "memory";
reg = <0x80000000 0x20000000>; /* 512 MB */
};
};

4
arch/arm/boot/dts/bcm23550.dtsi
View File

@ -36,9 +36,9 @@
/* BCM23550 and BCM21664 have almost identical clocks */
#include "dt-bindings/clock/bcm21664.h"
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "BCM23550 SoC";
compatible = "brcm,bcm23550";
interrupt-parent = <&gic>;

1
arch/arm/boot/dts/bcm28155-ap.dts
View File

@ -22,6 +22,7 @@
compatible = "brcm,bcm28155-ap", "brcm,bcm11351";
memory {
device_type = "memory";
reg = <0x80000000 0x40000000>; /* 1 GB */
};

1
arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts
View File

@ -20,6 +20,7 @@
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x08000000>;
};

1
arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
View File

@ -20,6 +20,7 @@
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x08000000>;
};

1
arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts
View File

@ -20,6 +20,7 @@
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x08000000>;
};

1
arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts
View File

@ -16,6 +16,7 @@
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};

1
arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
View File

@ -17,6 +17,7 @@
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};

1
arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts
View File

@ -16,6 +16,7 @@
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};

1
arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
View File

@ -20,6 +20,7 @@
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x08000000>;
};

1
arch/arm/boot/dts/bcm47094-linksys-panamera.dts
View File

@ -17,6 +17,7 @@
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x08000000>;
};

1
arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts
View File

@ -17,6 +17,7 @@
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x18000000>;
};

1
arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts
View File

@ -16,6 +16,7 @@
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};

1
arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts
View File

@ -17,6 +17,7 @@
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x18000000>;
};

1
arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
View File

@ -17,6 +17,7 @@
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x08000000>;
};

1
arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
View File

@ -17,6 +17,7 @@
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x18000000>;
};

1
arch/arm/boot/dts/bcm47094-netgear-r8500.dts
View File

@ -17,6 +17,7 @@
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x18000000>;
};

1
arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
View File

@ -17,6 +17,7 @@
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};

1
arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
View File

@ -17,6 +17,7 @@
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};

1
arch/arm/boot/dts/bcm47189-tenda-ac9.dts
View File

@ -16,6 +16,7 @@
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};

3
arch/arm/boot/dts/bcm5301x.dtsi
View File

@ -13,9 +13,10 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&gic>;
chipcommonA {

1
arch/arm/boot/dts/bcm53340-ubnt-unifi-switch8.dts
View File

@ -20,6 +20,7 @@
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>,
<0x68000000 0x08000000>;
};

3
arch/arm/boot/dts/bcm53573.dtsi
View File

@ -7,9 +7,10 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&gic>;
aliases {

4
arch/arm/boot/dts/bcm63138.dtsi
View File

@ -6,9 +6,9 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "brcm,bcm63138";
model = "Broadcom BCM63138 DSL SoC";
interrupt-parent = <&gic>;

2
arch/arm/boot/dts/bcm7445.dtsi
View File

@ -1,8 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
/ {
#address-cells = <2>;
#size-cells = <2>;

1
arch/arm/boot/dts/bcm947189acdbmr.dts
View File

@ -18,6 +18,7 @@
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};

1
arch/arm/boot/dts/bcm953012er.dts
View File

@ -40,6 +40,7 @@
compatible = "brcm,bcm953012er", "brcm,brcm53012", "brcm,bcm4708";
memory {
device_type = "memory";
reg = <0x00000000 0x8000000>;
};

1
arch/arm/boot/dts/bcm953012hr.dts
View File

@ -46,6 +46,7 @@
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x10000000>;
};
};

1
arch/arm/boot/dts/bcm953012k.dts
View File

@ -44,6 +44,7 @@
};
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>;
};
};

4
arch/arm/boot/dts/cx92755.dtsi
View File

@ -44,9 +44,9 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cnxt,cx92755";
interrupt-parent = <&intc>;

4
arch/arm/boot/dts/dove.dtsi
View File

@ -1,12 +1,12 @@
// SPDX-License-Identifier: GPL-2.0
/include/ "skeleton.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "marvell,dove";
model = "Marvell Armada 88AP510 SoC";
interrupt-parent = <&intc>;

4
arch/arm/boot/dts/ep7209.dtsi
View File

@ -6,11 +6,11 @@
/dts-v1/;
#include "skeleton.dtsi"
#include <dt-bindings/clock/clps711x-clock.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "Cirrus Logic EP7209";
compatible = "cirrus,ep7209";

1
arch/arm/boot/dts/ep7211-edb7211.dts
View File

@ -12,6 +12,7 @@
compatible = "cirrus,edb7211", "cirrus,ep7211", "cirrus,ep7209";
memory {
device_type = "memory";
reg = <0xc0000000 0x02000000>;
};

10
arch/arm/boot/dts/integrator.dtsi
View File

@ -3,9 +3,15 @@
* SoC core Device Tree for the ARM Integrator platforms
*/
/include/ "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
memory {
device_type = "memory";
reg = <0x0 0x0>;
};
core-module@10000000 {
compatible = "arm,core-module-integrator", "syscon", "simple-mfd";
reg = <0x10000000 0x200>;

3
arch/arm/boot/dts/kirkwood.dtsi
View File

@ -1,11 +1,12 @@
// SPDX-License-Identifier: GPL-2.0
/include/ "skeleton.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "marvell,kirkwood";
interrupt-parent = <&intc>;

4
arch/arm/boot/dts/lpc32xx.dtsi
View File

@ -11,12 +11,12 @@
* http://www.gnu.org/copyleft/gpl.html
*/
#include "skeleton.dtsi"
#include <dt-bindings/clock/lpc32xx-clock.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "nxp,lpc3220";
interrupt-parent = <&mic>;

8
arch/arm/boot/dts/ls1021a.dtsi
View File

@ -45,11 +45,12 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "skeleton64.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/thermal.h>
/ {
#address-cells = <2>;
#size-cells = <2>;
compatible = "fsl,ls1021a";
interrupt-parent = <&gic>;
@ -88,6 +89,11 @@
};
};
memory {
device_type = "memory";
reg = <0x0 0x0 0x0 0x0>;
};
sysclk: sysclk {
compatible = "fixed-clock";
#clock-cells = <0>;

3
arch/arm/boot/dts/meson.dtsi
View File

@ -47,9 +47,10 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/include/ "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&gic>;
L2: l2-cache-controller@c4200000 {

1
arch/arm/boot/dts/meson6-atv1200.dts
View File

@ -61,6 +61,7 @@
};
memory {
device_type = "memory";
reg = <0x40000000 0x80000000>;
};
};

1
arch/arm/boot/dts/meson8-minix-neo-x8.dts
View File

@ -57,6 +57,7 @@
};
memory {
device_type = "memory";
reg = <0x40000000 0x80000000>;
};

1
arch/arm/boot/dts/meson8b-ec100.dts
View File

@ -23,6 +23,7 @@
};
memory {
device_type = "memory";
reg = <0x40000000 0x40000000>;
};

1
arch/arm/boot/dts/meson8b-mxq.dts
View File

@ -60,6 +60,7 @@
};
memory {
device_type = "memory";
reg = <0x40000000 0x40000000>;
};
};

1
arch/arm/boot/dts/meson8b-odroidc1.dts
View File

@ -62,6 +62,7 @@
};
memory {
device_type = "memory";
reg = <0x40000000 0x40000000>;
};

1
arch/arm/boot/dts/meson8m2-mxiii-plus.dts
View File

@ -28,6 +28,7 @@
};
memory {
device_type = "memory";
reg = <0x40000000 0x80000000>;
};

1
arch/arm/boot/dts/mmp2-brownstone.dts
View File

@ -19,6 +19,7 @@
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};

4
arch/arm/boot/dts/mmp2.dtsi
View File

@ -7,10 +7,12 @@
* publishhed by the Free Software Foundation.
*/
#include "skeleton.dtsi"
#include <dt-bindings/clock/marvell,mmp2.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
aliases {
serial0 = &uart1;
serial1 = &uart2;

3
arch/arm/boot/dts/moxart.dtsi
View File

@ -5,10 +5,11 @@
* Licensed under GPLv2 or later.
*/
/include/ "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "moxa,moxart";
model = "MOXART";
interrupt-parent = <&intc>;

1
arch/arm/boot/dts/mt2701-evb.dts
View File

@ -13,6 +13,7 @@
compatible = "mediatek,mt2701-evb", "mediatek,mt2701";
memory {
device_type = "memory";
reg = <0 0x80000000 0 0x40000000>;
};

3
arch/arm/boot/dts/mt2701.dtsi
View File

@ -12,10 +12,11 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/memory/mt2701-larb-port.h>
#include <dt-bindings/reset/mt2701-resets.h>
#include "skeleton64.dtsi"
#include "mt2701-pinfunc.h"
/ {
#address-cells = <2>;
#size-cells = <2>;
compatible = "mediatek,mt2701";
interrupt-parent = <&cirq>;

1
arch/arm/boot/dts/mt6580-evbp1.dts
View File

@ -22,6 +22,7 @@
};
memory {
device_type = "memory";
reg = <0x80000000 0x20000000>;
};
};

1
arch/arm/boot/dts/mt6580.dtsi
View File

@ -7,7 +7,6 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
/ {
compatible = "mediatek,mt6580";

1
arch/arm/boot/dts/mt6589-aquaris5.dts
View File

@ -18,6 +18,7 @@
};
memory {
device_type = "memory";
reg = <0x80000000 0x40000000>;
};

3
arch/arm/boot/dts/mt6589.dtsi
View File

@ -7,9 +7,10 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "mediatek,mt6589";
interrupt-parent = <&sysirq>;

2
arch/arm/boot/dts/mt6592-evb.dts
View File

@ -13,7 +13,7 @@
compatible = "mediatek,mt6592-evb", "mediatek,mt6592";
memory {
device_type = "memory";
reg = <0x80000000 0x40000000>;
};
};

3
arch/arm/boot/dts/mt6592.dtsi
View File

@ -7,9 +7,10 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "mediatek,mt6592";
interrupt-parent = <&sysirq>;

1
arch/arm/boot/dts/mt8127-moose.dts
View File

@ -13,6 +13,7 @@
compatible = "mediatek,mt8127-moose", "mediatek,mt8127";
memory {
device_type = "memory";
reg = <0 0x80000000 0 0x40000000>;
};
};

3
arch/arm/boot/dts/mt8127.dtsi
View File

@ -7,9 +7,10 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton64.dtsi"
/ {
#address-cells = <2>;
#size-cells = <2>;
compatible = "mediatek,mt8127";
interrupt-parent = <&sysirq>;

1
arch/arm/boot/dts/mt8135-evbp1.dts
View File

@ -13,6 +13,7 @@
compatible = "mediatek,mt8135-evbp1", "mediatek,mt8135";
memory {
device_type = "memory";
reg = <0 0x80000000 0 0x40000000>;
};
};

3
arch/arm/boot/dts/mt8135.dtsi
View File

@ -9,10 +9,11 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/mt8135-resets.h>
#include "skeleton64.dtsi"
#include "mt8135-pinfunc.h"
/ {
#address-cells = <2>;
#size-cells = <2>;
compatible = "mediatek,mt8135";
interrupt-parent = <&sysirq>;

4
arch/arm/boot/dts/nspire.dtsi
View File

@ -9,9 +9,9 @@
*
*/
/include/ "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&intc>;
cpus {

1
arch/arm/boot/dts/orion5x-lacie-d2-network.dts
View File

@ -19,6 +19,7 @@
compatible = "lacie,d2-network", "marvell,orion5x-88f5182", "marvell,orion5x";
memory {
device_type = "memory";
reg = <0x00000000 0x4000000>; /* 64 MB */
};

1
arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
View File

@ -25,6 +25,7 @@
compatible = "lacie,ethernet-disk-mini-v2", "marvell,orion5x-88f5182", "marvell,orion5x";
memory {
device_type = "memory";
reg = <0x00000000 0x4000000>; /* 64 MB */
};

1
arch/arm/boot/dts/orion5x-lswsgl.dts
View File

@ -55,6 +55,7 @@
compatible = "buffalo,lswsgl", "marvell,orion5x-88f5182", "marvell,orion5x";
memory {
device_type = "memory";
reg = <0x00000000 0x8000000>; /* 128 MB */
};

1
arch/arm/boot/dts/orion5x-maxtor-shared-storage-2.dts
View File

@ -19,6 +19,7 @@
compatible = "maxtor,shared-storage-2", "marvell,orion5x-88f5182", "marvell,orion5x";
memory {
device_type = "memory";
reg = <0x00000000 0x4000000>; /* 64 MB */
};

1
arch/arm/boot/dts/orion5x-netgear-wnr854t.dts
View File

@ -21,6 +21,7 @@
};
memory {
device_type = "memory";
reg = <0x00000000 0x2000000>; /* 32 MB */
};

1
arch/arm/boot/dts/orion5x-rd88f5182-nas.dts
View File

@ -16,6 +16,7 @@
compatible = "marvell,rd-88f5182-nas", "marvell,orion5x-88f5182", "marvell,orion5x";
memory {
device_type = "memory";
reg = <0x00000000 0x4000000>; /* 64 MB */
};

4
arch/arm/boot/dts/orion5x.dtsi
View File

@ -6,11 +6,11 @@
* warranty of any kind, whether express or implied.
*/
#include "skeleton.dtsi"
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "Marvell Orion5x SoC";
compatible = "marvell,orion5x";
interrupt-parent = <&intc>;

4
arch/arm/boot/dts/ox810se.dtsi
View File

@ -6,11 +6,12 @@
* Licensed under GPLv2 or later
*/
/include/ "skeleton.dtsi"
#include <dt-bindings/clock/oxsemi,ox810se.h>
#include <dt-bindings/reset/oxsemi,ox810se.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "oxsemi,ox810se";
cpus {
@ -25,6 +26,7 @@
};
memory {
device_type = "memory";
/* Max 256MB @ 0x48000000 */
reg = <0x48000000 0x10000000>;
};

4
arch/arm/boot/dts/ox820.dtsi
View File

@ -6,12 +6,13 @@
* Licensed under GPLv2 or later
*/
/include/ "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/oxsemi,ox820.h>
#include <dt-bindings/reset/oxsemi,ox820.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "oxsemi,ox820";
cpus {
@ -35,6 +36,7 @@
};
memory {
device_type = "memory";
/* Max 512MB @ 0x60000000 */
reg = <0x60000000 0x20000000>;
};

1
arch/arm/boot/dts/picoxcell-pc3x2.dtsi
View File

@ -10,7 +10,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/include/ "skeleton.dtsi"
/ {
model = "Picochip picoXcell PC3X2";
compatible = "picochip,pc3x2";

1
arch/arm/boot/dts/picoxcell-pc3x3.dtsi
View File

@ -10,7 +10,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/include/ "skeleton.dtsi"
/ {
model = "Picochip picoXcell PC3X3";
compatible = "picochip,pc3x3";

1
arch/arm/boot/dts/prima2-evb.dts
View File

@ -15,6 +15,7 @@
compatible = "sirf,prima2", "sirf,prima2-cb";
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>;
};

1
arch/arm/boot/dts/prima2.dtsi
View File

@ -6,7 +6,6 @@
* Licensed under GPLv2 or later.
*/
/include/ "skeleton.dtsi"
/ {
compatible = "sirf,prima2";
#address-cells = <1>;

4
arch/arm/boot/dts/pxa168.dtsi
View File

@ -7,10 +7,12 @@
* publishhed by the Free Software Foundation.
*/
#include "skeleton.dtsi"
#include <dt-bindings/clock/marvell,pxa168.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
aliases {
serial0 = &uart1;
serial1 = &uart2;

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