From accff74e8fbff8d5eedb19f6eccf04b318cf6174 Mon Sep 17 00:00:00 2001 From: Lewis Huang Date: Wed, 13 Jan 2021 18:00:50 +0800 Subject: [PATCH] drm/amd/display: Set power_gated to true for seamless boot pipe init [Why] In seamless boot without a flip case, the flag power_gated didn't get cleared when resetting path mode because the plane_state is null. The following sequence will cause this issue: 1. OS call set mode to clone/extended 2. Reset path mode to remove edp [How] Set power gated default to true in seamless boot pipe Signed-off-by: Lewis Huang Reviewed-by: Martin Leung Acked-by: Anson Jacob Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c index 95a87dbc024d..89912bb5014f 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c @@ -1224,6 +1224,7 @@ void dcn10_init_pipes(struct dc *dc, struct dc_state *context) // signals when OTG blanked. This is to prevent pipe from // requesting data while in PSR. tg->funcs->tg_init(tg); + hubp->power_gated = true; continue; }