mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-23 09:19:51 +00:00
Merge branch 'perf/urgent' into perf/core, to merge fixes before pulling more changes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
commit
acd632eb64
273 changed files with 2060 additions and 1540 deletions
|
@ -35,3 +35,6 @@ the PCIe specification.
|
|||
|
||||
NOTE: this only applies to the SMMU itself, not
|
||||
masters connected upstream of the SMMU.
|
||||
|
||||
- hisilicon,broken-prefetch-cmd
|
||||
: Avoid sending CMD_PREFETCH_* commands to the SMMU.
|
||||
|
|
|
@ -17,7 +17,6 @@ Required properties:
|
|||
"fsl,imx6sx-usdhc"
|
||||
|
||||
Optional properties:
|
||||
- fsl,cd-controller : Indicate to use controller internal card detection
|
||||
- fsl,wp-controller : Indicate to use controller internal write protection
|
||||
- fsl,delay-line : Specify the number of delay cells for override mode.
|
||||
This is used to set the clock delay for DLL(Delay Line) on override mode
|
||||
|
@ -35,7 +34,6 @@ esdhc@70004000 {
|
|||
compatible = "fsl,imx51-esdhc";
|
||||
reg = <0x70004000 0x4000>;
|
||||
interrupts = <1>;
|
||||
fsl,cd-controller;
|
||||
fsl,wp-controller;
|
||||
};
|
||||
|
||||
|
|
16
MAINTAINERS
16
MAINTAINERS
|
@ -5899,7 +5899,6 @@ S: Supported
|
|||
F: Documentation/s390/kvm.txt
|
||||
F: arch/s390/include/asm/kvm*
|
||||
F: arch/s390/kvm/
|
||||
F: drivers/s390/kvm/
|
||||
|
||||
KERNEL VIRTUAL MACHINE (KVM) FOR ARM
|
||||
M: Christoffer Dall <christoffer.dall@linaro.org>
|
||||
|
@ -6839,6 +6838,12 @@ T: git git://linuxtv.org/anttip/media_tree.git
|
|||
S: Maintained
|
||||
F: drivers/media/usb/msi2500/
|
||||
|
||||
MSYSTEMS DISKONCHIP G3 MTD DRIVER
|
||||
M: Robert Jarzmik <robert.jarzmik@free.fr>
|
||||
L: linux-mtd@lists.infradead.org
|
||||
S: Maintained
|
||||
F: drivers/mtd/devices/docg3*
|
||||
|
||||
MT9M032 APTINA SENSOR DRIVER
|
||||
M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
|
@ -10896,6 +10901,15 @@ F: drivers/block/virtio_blk.c
|
|||
F: include/linux/virtio_*.h
|
||||
F: include/uapi/linux/virtio_*.h
|
||||
|
||||
VIRTIO DRIVERS FOR S390
|
||||
M: Christian Borntraeger <borntraeger@de.ibm.com>
|
||||
M: Cornelia Huck <cornelia.huck@de.ibm.com>
|
||||
L: linux-s390@vger.kernel.org
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: kvm@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/s390/virtio/
|
||||
|
||||
VIRTIO GPU DRIVER
|
||||
M: David Airlie <airlied@linux.ie>
|
||||
M: Gerd Hoffmann <kraxel@redhat.com>
|
||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 4
|
||||
PATCHLEVEL = 2
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc3
|
||||
EXTRAVERSION = -rc4
|
||||
NAME = Hurr durr I'ma sheep
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -10,6 +10,7 @@
|
|||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include "imx25.dtsi"
|
||||
|
||||
|
@ -114,8 +115,8 @@ &can1 {
|
|||
&esdhc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_esdhc1>;
|
||||
cd-gpios = <&gpio2 1 0>;
|
||||
wp-gpios = <&gpio2 0 0>;
|
||||
cd-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
@ -98,7 +98,7 @@ &ecspi2 {
|
|||
&esdhc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_esdhc1>;
|
||||
cd-gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
|
||||
cd-gpios = <&gpio2 29 GPIO_ACTIVE_LOW>;
|
||||
bus-width = <4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -103,8 +103,8 @@ volume-down {
|
|||
&esdhc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_esdhc1>;
|
||||
cd-gpios = <&gpio1 1 0>;
|
||||
wp-gpios = <&gpio1 9 0>;
|
||||
cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
@ -124,8 +124,8 @@ &can2 {
|
|||
&esdhc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_esdhc1>;
|
||||
cd-gpios = <&gpio1 1 0>;
|
||||
wp-gpios = <&gpio1 9 0>;
|
||||
cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
@ -147,8 +147,8 @@ &ssi2 {
|
|||
&esdhc3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_esdhc3>;
|
||||
cd-gpios = <&gpio3 11 0>;
|
||||
wp-gpios = <&gpio3 12 0>;
|
||||
cd-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
|
||||
bus-width = <8>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -41,8 +41,8 @@ volume-down {
|
|||
&esdhc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_esdhc1>;
|
||||
cd-gpios = <&gpio3 13 0>;
|
||||
wp-gpios = <&gpio4 11 0>;
|
||||
cd-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
@ -41,8 +41,8 @@ &esdhc2 {
|
|||
pinctrl-0 = <&pinctrl_esdhc2>,
|
||||
<&pinctrl_esdhc2_cdwp>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
wp-gpios = <&gpio1 2 0>;
|
||||
cd-gpios = <&gpio1 4 0>;
|
||||
wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
|
||||
cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -183,7 +183,7 @@ spidev1: spi@1 {
|
|||
};
|
||||
|
||||
&esdhc1 {
|
||||
cd-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>;
|
||||
cd-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
|
||||
fsl,wp-controller;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_esdhc1>;
|
||||
|
@ -191,7 +191,7 @@ &esdhc1 {
|
|||
};
|
||||
|
||||
&esdhc2 {
|
||||
cd-gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>;
|
||||
cd-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
|
||||
fsl,wp-controller;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_esdhc2>;
|
||||
|
|
|
@ -119,8 +119,8 @@ &audmux {
|
|||
&esdhc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_esdhc2>;
|
||||
cd-gpios = <&gpio3 25 0>;
|
||||
wp-gpios = <&gpio2 19 0>;
|
||||
cd-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -305,8 +305,8 @@ &usbotg {
|
|||
&usdhc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>;
|
||||
cd-gpios = <&gpio1 4 0>;
|
||||
wp-gpios = <&gpio1 2 0>;
|
||||
cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -314,8 +314,8 @@ &usdhc2 {
|
|||
&usdhc3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
cd-gpios = <&gpio7 0 0>;
|
||||
wp-gpios = <&gpio7 1 0>;
|
||||
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -11,6 +11,7 @@
|
|||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "imx6q.dtsi"
|
||||
|
||||
/ {
|
||||
|
@ -196,8 +197,8 @@ &usbotg {
|
|||
};
|
||||
|
||||
&usdhc3 {
|
||||
cd-gpios = <&gpio6 11 0>;
|
||||
wp-gpios = <&gpio6 14 0>;
|
||||
cd-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc3
|
||||
|
|
|
@ -7,6 +7,7 @@
|
|||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "imx6q.dtsi"
|
||||
|
||||
/ {
|
||||
|
@ -161,7 +162,7 @@ &usdhc3 {
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio6 11 0>;
|
||||
cd-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -251,7 +251,7 @@ &usdhc2 {
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
|
||||
cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -260,7 +260,7 @@ &usdhc3 {
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
|
||||
cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
status = "okay";
|
||||
|
|
|
@ -173,7 +173,7 @@ &usdhc1 {
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc1>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
cd-gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>;
|
||||
cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
@ -181,7 +181,7 @@ &usdhc2 {
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
cd-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;
|
||||
cd-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
@ -392,7 +392,7 @@ &usbotg {
|
|||
&usdhc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc1>;
|
||||
cd-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
|
||||
cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
|
||||
no-1-8-v;
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -400,7 +400,7 @@ &usdhc1 {
|
|||
&usdhc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>;
|
||||
cd-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
|
||||
cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
|
||||
no-1-8-v;
|
||||
status = "okay";
|
||||
|
|
|
@ -258,6 +258,6 @@ &usdhc2 {
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_cubox_i_usdhc2_aux &pinctrl_cubox_i_usdhc2>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
cd-gpios = <&gpio1 4 0>;
|
||||
cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -1,3 +1,5 @@
|
|||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/ {
|
||||
regulators {
|
||||
compatible = "simple-bus";
|
||||
|
@ -181,7 +183,7 @@ &usbotg {
|
|||
&usdhc2 { /* module slot */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>;
|
||||
cd-gpios = <&gpio2 2 0>;
|
||||
cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
@ -318,7 +318,7 @@ &usbh1 {
|
|||
&usdhc3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
|
||||
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -324,7 +324,7 @@ &usbh1 {
|
|||
&usdhc3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
|
||||
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -417,7 +417,7 @@ &usbh1 {
|
|||
&usdhc3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
|
||||
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -299,6 +299,6 @@ &pinctrl_hummingboard_usdhc2_aux
|
|||
&pinctrl_hummingboard_usdhc2
|
||||
>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
cd-gpios = <&gpio1 4 0>;
|
||||
cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -453,7 +453,7 @@ &usbotg {
|
|||
&usdhc3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
cd-gpios = <&gpio7 0 0>;
|
||||
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -461,7 +461,7 @@ &usdhc3 {
|
|||
&usdhc4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc4>;
|
||||
cd-gpios = <&gpio2 6 0>;
|
||||
cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -409,8 +409,8 @@ &usbotg {
|
|||
&usdhc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>;
|
||||
cd-gpios = <&gpio1 4 0>;
|
||||
wp-gpios = <&gpio1 2 0>;
|
||||
cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -418,7 +418,7 @@ &usdhc3 {
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc3
|
||||
&pinctrl_usdhc3_cdwp>;
|
||||
cd-gpios = <&gpio1 27 0>;
|
||||
wp-gpios = <&gpio1 29 0>;
|
||||
cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
@ -342,7 +342,7 @@ &usdhc2 {
|
|||
pinctrl-0 = <&pinctrl_usdhc2>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
@ -351,6 +351,6 @@ &usdhc3 {
|
|||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -467,8 +467,8 @@ &usdhc3 {
|
|||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
cd-gpios = <&gpio6 15 0>;
|
||||
wp-gpios = <&gpio1 13 0>;
|
||||
cd-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
@ -448,8 +448,8 @@ &usbotg {
|
|||
&usdhc3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
cd-gpios = <&gpio7 0 0>;
|
||||
wp-gpios = <&gpio7 1 0>;
|
||||
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -457,7 +457,7 @@ &usdhc3 {
|
|||
&usdhc4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc4>;
|
||||
cd-gpios = <&gpio2 6 0>;
|
||||
cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -562,8 +562,8 @@ &usdhc2 {
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>;
|
||||
bus-width = <8>;
|
||||
cd-gpios = <&gpio2 2 0>;
|
||||
wp-gpios = <&gpio2 3 0>;
|
||||
cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
@ -571,8 +571,8 @@ &usdhc3 {
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
bus-width = <8>;
|
||||
cd-gpios = <&gpio2 0 0>;
|
||||
wp-gpios = <&gpio2 1 0>;
|
||||
cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
@ -680,7 +680,7 @@ &usdhc1 {
|
|||
pinctrl-0 = <&pinctrl_usdhc1>;
|
||||
bus-width = <4>;
|
||||
no-1-8-v;
|
||||
cd-gpios = <&gpio7 2 0>;
|
||||
cd-gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
|
||||
fsl,wp-controller;
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -690,7 +690,7 @@ &usdhc2 {
|
|||
pinctrl-0 = <&pinctrl_usdhc2>;
|
||||
bus-width = <4>;
|
||||
no-1-8-v;
|
||||
cd-gpios = <&gpio7 3 0>;
|
||||
cd-gpios = <&gpio7 3 GPIO_ACTIVE_LOW>;
|
||||
fsl,wp-controller;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -9,6 +9,8 @@
|
|||
*
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/ {
|
||||
regulators {
|
||||
compatible = "simple-bus";
|
||||
|
@ -250,13 +252,13 @@ &usbotg {
|
|||
&usdhc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc1>;
|
||||
cd-gpios = <&gpio1 2 0>;
|
||||
cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
cd-gpios = <&gpio3 9 0>;
|
||||
cd-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -617,8 +617,8 @@ &usdhc1 {
|
|||
pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
|
||||
bus-width = <8>;
|
||||
cd-gpios = <&gpio4 7 0>;
|
||||
wp-gpios = <&gpio4 6 0>;
|
||||
cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
@ -627,8 +627,8 @@ &usdhc2 {
|
|||
pinctrl-0 = <&pinctrl_usdhc2>;
|
||||
pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
|
||||
cd-gpios = <&gpio5 0 0>;
|
||||
wp-gpios = <&gpio4 29 0>;
|
||||
cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
@ -637,6 +637,6 @@ &usdhc3 {
|
|||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
cd-gpios = <&gpio3 22 0>;
|
||||
cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -49,7 +49,7 @@ &usdhc3 {
|
|||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
bus-width = <8>;
|
||||
cd-gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>;
|
||||
cd-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
|
||||
keep-power-in-suspend;
|
||||
enable-sdio-wakeup;
|
||||
|
@ -61,7 +61,7 @@ &usdhc4 {
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc4>;
|
||||
bus-width = <8>;
|
||||
cd-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
|
||||
cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>;
|
||||
no-1-8-v;
|
||||
keep-power-in-suspend;
|
||||
enable-sdio-wakup;
|
||||
|
|
|
@ -293,7 +293,7 @@ &usdhc3 {
|
|||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
bus-width = <8>;
|
||||
cd-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
|
||||
cd-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
|
||||
keep-power-in-suspend;
|
||||
enable-sdio-wakeup;
|
||||
|
@ -304,7 +304,7 @@ &usdhc3 {
|
|||
&usdhc4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc4>;
|
||||
cd-gpios = <&gpio6 21 GPIO_ACTIVE_HIGH>;
|
||||
cd-gpios = <&gpio6 21 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -234,8 +234,8 @@ &uart1 {
|
|||
&usdhc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc1>;
|
||||
cd-gpios = <&gpio5 0 0>;
|
||||
wp-gpios = <&gpio5 1 0>;
|
||||
cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
|
||||
enable-sdio-wakeup;
|
||||
keep-power-in-suspend;
|
||||
status = "okay";
|
||||
|
|
|
@ -74,32 +74,52 @@ struct jit_ctx {
|
|||
|
||||
int bpf_jit_enable __read_mostly;
|
||||
|
||||
static u64 jit_get_skb_b(struct sk_buff *skb, unsigned offset)
|
||||
static inline int call_neg_helper(struct sk_buff *skb, int offset, void *ret,
|
||||
unsigned int size)
|
||||
{
|
||||
void *ptr = bpf_internal_load_pointer_neg_helper(skb, offset, size);
|
||||
|
||||
if (!ptr)
|
||||
return -EFAULT;
|
||||
memcpy(ret, ptr, size);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static u64 jit_get_skb_b(struct sk_buff *skb, int offset)
|
||||
{
|
||||
u8 ret;
|
||||
int err;
|
||||
|
||||
err = skb_copy_bits(skb, offset, &ret, 1);
|
||||
if (offset < 0)
|
||||
err = call_neg_helper(skb, offset, &ret, 1);
|
||||
else
|
||||
err = skb_copy_bits(skb, offset, &ret, 1);
|
||||
|
||||
return (u64)err << 32 | ret;
|
||||
}
|
||||
|
||||
static u64 jit_get_skb_h(struct sk_buff *skb, unsigned offset)
|
||||
static u64 jit_get_skb_h(struct sk_buff *skb, int offset)
|
||||
{
|
||||
u16 ret;
|
||||
int err;
|
||||
|
||||
err = skb_copy_bits(skb, offset, &ret, 2);
|
||||
if (offset < 0)
|
||||
err = call_neg_helper(skb, offset, &ret, 2);
|
||||
else
|
||||
err = skb_copy_bits(skb, offset, &ret, 2);
|
||||
|
||||
return (u64)err << 32 | ntohs(ret);
|
||||
}
|
||||
|
||||
static u64 jit_get_skb_w(struct sk_buff *skb, unsigned offset)
|
||||
static u64 jit_get_skb_w(struct sk_buff *skb, int offset)
|
||||
{
|
||||
u32 ret;
|
||||
int err;
|
||||
|
||||
err = skb_copy_bits(skb, offset, &ret, 4);
|
||||
if (offset < 0)
|
||||
err = call_neg_helper(skb, offset, &ret, 4);
|
||||
else
|
||||
err = skb_copy_bits(skb, offset, &ret, 4);
|
||||
|
||||
return (u64)err << 32 | ntohl(ret);
|
||||
}
|
||||
|
@ -536,9 +556,6 @@ static int build_body(struct jit_ctx *ctx)
|
|||
case BPF_LD | BPF_B | BPF_ABS:
|
||||
load_order = 0;
|
||||
load:
|
||||
/* the interpreter will deal with the negative K */
|
||||
if ((int)k < 0)
|
||||
return -ENOTSUPP;
|
||||
emit_mov_i(r_off, k, ctx);
|
||||
load_common:
|
||||
ctx->seen |= SEEN_DATA | SEEN_CALL;
|
||||
|
@ -547,12 +564,24 @@ static int build_body(struct jit_ctx *ctx)
|
|||
emit(ARM_SUB_I(r_scratch, r_skb_hl,
|
||||
1 << load_order), ctx);
|
||||
emit(ARM_CMP_R(r_scratch, r_off), ctx);
|
||||
condt = ARM_COND_HS;
|
||||
condt = ARM_COND_GE;
|
||||
} else {
|
||||
emit(ARM_CMP_R(r_skb_hl, r_off), ctx);
|
||||
condt = ARM_COND_HI;
|
||||
}
|
||||
|
||||
/*
|
||||
* test for negative offset, only if we are
|
||||
* currently scheduled to take the fast
|
||||
* path. this will update the flags so that
|
||||
* the slowpath instruction are ignored if the
|
||||
* offset is negative.
|
||||
*
|
||||
* for loard_order == 0 the HI condition will
|
||||
* make loads at offset 0 take the slow path too.
|
||||
*/
|
||||
_emit(condt, ARM_CMP_I(r_off, 0), ctx);
|
||||
|
||||
_emit(condt, ARM_ADD_R(r_scratch, r_off, r_skb_data),
|
||||
ctx);
|
||||
|
||||
|
@ -860,9 +889,11 @@ static int build_body(struct jit_ctx *ctx)
|
|||
off = offsetof(struct sk_buff, vlan_tci);
|
||||
emit(ARM_LDRH_I(r_A, r_skb, off), ctx);
|
||||
if (code == (BPF_ANC | SKF_AD_VLAN_TAG))
|
||||
OP_IMM3(ARM_AND, r_A, r_A, VLAN_VID_MASK, ctx);
|
||||
else
|
||||
OP_IMM3(ARM_AND, r_A, r_A, VLAN_TAG_PRESENT, ctx);
|
||||
OP_IMM3(ARM_AND, r_A, r_A, ~VLAN_TAG_PRESENT, ctx);
|
||||
else {
|
||||
OP_IMM3(ARM_LSR, r_A, r_A, 12, ctx);
|
||||
OP_IMM3(ARM_AND, r_A, r_A, 0x1, ctx);
|
||||
}
|
||||
break;
|
||||
case BPF_ANC | SKF_AD_QUEUE:
|
||||
ctx->seen |= SEEN_SKB;
|
||||
|
|
|
@ -585,7 +585,8 @@ ENDPROC(el0_irq)
|
|||
*
|
||||
*/
|
||||
ENTRY(cpu_switch_to)
|
||||
add x8, x0, #THREAD_CPU_CONTEXT
|
||||
mov x10, #THREAD_CPU_CONTEXT
|
||||
add x8, x0, x10
|
||||
mov x9, sp
|
||||
stp x19, x20, [x8], #16 // store callee-saved registers
|
||||
stp x21, x22, [x8], #16
|
||||
|
@ -594,7 +595,7 @@ ENTRY(cpu_switch_to)
|
|||
stp x27, x28, [x8], #16
|
||||
stp x29, x9, [x8], #16
|
||||
str lr, [x8]
|
||||
add x8, x1, #THREAD_CPU_CONTEXT
|
||||
add x8, x1, x10
|
||||
ldp x19, x20, [x8], #16 // restore callee-saved registers
|
||||
ldp x21, x22, [x8], #16
|
||||
ldp x23, x24, [x8], #16
|
||||
|
|
|
@ -61,7 +61,7 @@ void __init init_IRQ(void)
|
|||
static bool migrate_one_irq(struct irq_desc *desc)
|
||||
{
|
||||
struct irq_data *d = irq_desc_get_irq_data(desc);
|
||||
const struct cpumask *affinity = d->affinity;
|
||||
const struct cpumask *affinity = irq_data_get_affinity_mask(d);
|
||||
struct irq_chip *c;
|
||||
bool ret = false;
|
||||
|
||||
|
@ -81,7 +81,7 @@ static bool migrate_one_irq(struct irq_desc *desc)
|
|||
if (!c->irq_set_affinity)
|
||||
pr_debug("IRQ%u: unable to set affinity\n", d->irq);
|
||||
else if (c->irq_set_affinity(d, affinity, false) == IRQ_SET_MASK_OK && ret)
|
||||
cpumask_copy(d->affinity, affinity);
|
||||
cpumask_copy(irq_data_get_affinity_mask(d), affinity);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
|
@ -174,6 +174,11 @@ static inline void _writel(unsigned long l, unsigned long addr)
|
|||
#define iowrite16 writew
|
||||
#define iowrite32 writel
|
||||
|
||||
#define ioread16be(addr) be16_to_cpu(readw(addr))
|
||||
#define ioread32be(addr) be32_to_cpu(readl(addr))
|
||||
#define iowrite16be(v, addr) writew(cpu_to_be16(v), (addr))
|
||||
#define iowrite32be(v, addr) writel(cpu_to_be32(v), (addr))
|
||||
|
||||
#define mmiowb()
|
||||
|
||||
#define flush_write_buffers() do { } while (0) /* M32R_FIXME */
|
||||
|
|
|
@ -1139,7 +1139,7 @@ static void __init load_hv_initrd(void)
|
|||
|
||||
void __init free_initrd_mem(unsigned long begin, unsigned long end)
|
||||
{
|
||||
free_bootmem(__pa(begin), end - begin);
|
||||
free_bootmem_late(__pa(begin), end - begin);
|
||||
}
|
||||
|
||||
static int __init setup_initrd(char *str)
|
||||
|
|
|
@ -205,7 +205,6 @@ sysexit_from_sys_call:
|
|||
movl RDX(%rsp), %edx /* arg3 */
|
||||
movl RSI(%rsp), %ecx /* arg4 */
|
||||
movl RDI(%rsp), %r8d /* arg5 */
|
||||
movl %ebp, %r9d /* arg6 */
|
||||
.endm
|
||||
|
||||
.macro auditsys_exit exit
|
||||
|
@ -236,6 +235,7 @@ sysexit_from_sys_call:
|
|||
|
||||
sysenter_auditsys:
|
||||
auditsys_entry_common
|
||||
movl %ebp, %r9d /* reload 6th syscall arg */
|
||||
jmp sysenter_dispatch
|
||||
|
||||
sysexit_audit:
|
||||
|
@ -336,7 +336,7 @@ ENTRY(entry_SYSCALL_compat)
|
|||
* 32-bit zero extended:
|
||||
*/
|
||||
ASM_STAC
|
||||
1: movl (%r8), %ebp
|
||||
1: movl (%r8), %r9d
|
||||
_ASM_EXTABLE(1b, ia32_badarg)
|
||||
ASM_CLAC
|
||||
orl $TS_COMPAT, ASM_THREAD_INFO(TI_status, %rsp, SIZEOF_PTREGS)
|
||||
|
@ -346,7 +346,7 @@ ENTRY(entry_SYSCALL_compat)
|
|||
cstar_do_call:
|
||||
/* 32-bit syscall -> 64-bit C ABI argument conversion */
|
||||
movl %edi, %r8d /* arg5 */
|
||||
movl %ebp, %r9d /* arg6 */
|
||||
/* r9 already loaded */ /* arg6 */
|
||||
xchg %ecx, %esi /* rsi:arg2, rcx:arg4 */
|
||||
movl %ebx, %edi /* arg1 */
|
||||
movl %edx, %edx /* arg3 (zero extension) */
|
||||
|
@ -358,7 +358,6 @@ cstar_dispatch:
|
|||
call *ia32_sys_call_table(, %rax, 8)
|
||||
movq %rax, RAX(%rsp)
|
||||
1:
|
||||
movl RCX(%rsp), %ebp
|
||||
DISABLE_INTERRUPTS(CLBR_NONE)
|
||||
TRACE_IRQS_OFF
|
||||
testl $_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
|
||||
|
@ -392,7 +391,9 @@ sysretl_from_sys_call:
|
|||
|
||||
#ifdef CONFIG_AUDITSYSCALL
|
||||
cstar_auditsys:
|
||||
movl %r9d, R9(%rsp) /* register to be clobbered by call */
|
||||
auditsys_entry_common
|
||||
movl R9(%rsp), %r9d /* reload 6th syscall arg */
|
||||
jmp cstar_dispatch
|
||||
|
||||
sysretl_audit:
|
||||
|
@ -404,14 +405,16 @@ cstar_tracesys:
|
|||
testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT), ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
|
||||
jz cstar_auditsys
|
||||
#endif
|
||||
xchgl %r9d, %ebp
|
||||
SAVE_EXTRA_REGS
|
||||
xorl %eax, %eax /* Do not leak kernel information */
|
||||
movq %rax, R11(%rsp)
|
||||
movq %rax, R10(%rsp)
|
||||
movq %rax, R9(%rsp)
|
||||
movq %r9, R9(%rsp)
|
||||
movq %rax, R8(%rsp)
|
||||
movq %rsp, %rdi /* &pt_regs -> arg1 */
|
||||
call syscall_trace_enter
|
||||
movl R9(%rsp), %r9d
|
||||
|
||||
/* Reload arg registers from stack. (see sysenter_tracesys) */
|
||||
movl RCX(%rsp), %ecx
|
||||
|
@ -421,6 +424,7 @@ cstar_tracesys:
|
|||
movl %eax, %eax /* zero extension */
|
||||
|
||||
RESTORE_EXTRA_REGS
|
||||
xchgl %ebp, %r9d
|
||||
jmp cstar_do_call
|
||||
END(entry_SYSCALL_compat)
|
||||
|
||||
|
|
|
@ -354,7 +354,7 @@ struct kvm_xcrs {
|
|||
struct kvm_sync_regs {
|
||||
};
|
||||
|
||||
#define KVM_QUIRK_LINT0_REENABLED (1 << 0)
|
||||
#define KVM_QUIRK_CD_NW_CLEARED (1 << 1)
|
||||
#define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0)
|
||||
#define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1)
|
||||
|
||||
#endif /* _ASM_X86_KVM_H */
|
||||
|
|
|
@ -951,6 +951,14 @@ static u64 intel_cqm_event_count(struct perf_event *event)
|
|||
if (!cqm_group_leader(event))
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* Getting up-to-date values requires an SMP IPI which is not
|
||||
* possible if we're being called in interrupt context. Return
|
||||
* the cached values instead.
|
||||
*/
|
||||
if (unlikely(in_interrupt()))
|
||||
goto out;
|
||||
|
||||
/*
|
||||
* Notice that we don't perform the reading of an RMID
|
||||
* atomically, because we can't hold a spin lock across the
|
||||
|
|
|
@ -351,9 +351,15 @@ static int __init x86_noxsave_setup(char *s)
|
|||
|
||||
setup_clear_cpu_cap(X86_FEATURE_XSAVE);
|
||||
setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
|
||||
setup_clear_cpu_cap(X86_FEATURE_XSAVEC);
|
||||
setup_clear_cpu_cap(X86_FEATURE_XSAVES);
|
||||
setup_clear_cpu_cap(X86_FEATURE_AVX);
|
||||
setup_clear_cpu_cap(X86_FEATURE_AVX2);
|
||||
setup_clear_cpu_cap(X86_FEATURE_AVX512F);
|
||||
setup_clear_cpu_cap(X86_FEATURE_AVX512PF);
|
||||
setup_clear_cpu_cap(X86_FEATURE_AVX512ER);
|
||||
setup_clear_cpu_cap(X86_FEATURE_AVX512CD);
|
||||
setup_clear_cpu_cap(X86_FEATURE_MPX);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
|
|
@ -1595,7 +1595,7 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event)
|
|||
for (i = 0; i < APIC_LVT_NUM; i++)
|
||||
apic_set_reg(apic, APIC_LVTT + 0x10 * i, APIC_LVT_MASKED);
|
||||
apic_update_lvtt(apic);
|
||||
if (!(vcpu->kvm->arch.disabled_quirks & KVM_QUIRK_LINT0_REENABLED))
|
||||
if (kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_LINT0_REENABLED))
|
||||
apic_set_reg(apic, APIC_LVT0,
|
||||
SET_APIC_DELIVERY_MODE(0, APIC_MODE_EXTINT));
|
||||
apic_manage_nmi_watchdog(apic, kvm_apic_get_reg(apic, APIC_LVT0));
|
||||
|
|
|
@ -120,6 +120,16 @@ static u8 mtrr_default_type(struct kvm_mtrr *mtrr_state)
|
|||
return mtrr_state->deftype & IA32_MTRR_DEF_TYPE_TYPE_MASK;
|
||||
}
|
||||
|
||||
static u8 mtrr_disabled_type(void)
|
||||
{
|
||||
/*
|
||||
* Intel SDM 11.11.2.2: all MTRRs are disabled when
|
||||
* IA32_MTRR_DEF_TYPE.E bit is cleared, and the UC
|
||||
* memory type is applied to all of physical memory.
|
||||
*/
|
||||
return MTRR_TYPE_UNCACHABLE;
|
||||
}
|
||||
|
||||
/*
|
||||
* Three terms are used in the following code:
|
||||
* - segment, it indicates the address segments covered by fixed MTRRs.
|
||||
|
@ -434,6 +444,8 @@ struct mtrr_iter {
|
|||
|
||||
/* output fields. */
|
||||
int mem_type;
|
||||
/* mtrr is completely disabled? */
|
||||
bool mtrr_disabled;
|
||||
/* [start, end) is not fully covered in MTRRs? */
|
||||
bool partial_map;
|
||||
|
||||
|
@ -549,7 +561,7 @@ static void mtrr_lookup_var_next(struct mtrr_iter *iter)
|
|||
static void mtrr_lookup_start(struct mtrr_iter *iter)
|
||||
{
|
||||
if (!mtrr_is_enabled(iter->mtrr_state)) {
|
||||
iter->partial_map = true;
|
||||
iter->mtrr_disabled = true;
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -563,6 +575,7 @@ static void mtrr_lookup_init(struct mtrr_iter *iter,
|
|||
iter->mtrr_state = mtrr_state;
|
||||
iter->start = start;
|
||||
iter->end = end;
|
||||
iter->mtrr_disabled = false;
|
||||
iter->partial_map = false;
|
||||
iter->fixed = false;
|
||||
iter->range = NULL;
|
||||
|
@ -656,15 +669,19 @@ u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
|
|||
return MTRR_TYPE_WRBACK;
|
||||
}
|
||||
|
||||
/* It is not covered by MTRRs. */
|
||||
if (iter.partial_map) {
|
||||
/*
|
||||
* We just check one page, partially covered by MTRRs is
|
||||
* impossible.
|
||||
*/
|
||||
WARN_ON(type != -1);
|
||||
type = mtrr_default_type(mtrr_state);
|
||||
}
|
||||
if (iter.mtrr_disabled)
|
||||
return mtrr_disabled_type();
|
||||
|
||||
/*
|
||||
* We just check one page, partially covered by MTRRs is
|
||||
* impossible.
|
||||
*/
|
||||
WARN_ON(iter.partial_map);
|
||||
|
||||
/* not contained in any MTRRs. */
|
||||
if (type == -1)
|
||||
return mtrr_default_type(mtrr_state);
|
||||
|
||||
return type;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(kvm_mtrr_get_guest_memory_type);
|
||||
|
@ -689,6 +706,9 @@ bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn,
|
|||
return false;
|
||||
}
|
||||
|
||||
if (iter.mtrr_disabled)
|
||||
return true;
|
||||
|
||||
if (!iter.partial_map)
|
||||
return true;
|
||||
|
||||
|
|
|
@ -1672,7 +1672,7 @@ static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
|
|||
* does not do it - this results in some delay at
|
||||
* reboot
|
||||
*/
|
||||
if (!(vcpu->kvm->arch.disabled_quirks & KVM_QUIRK_CD_NW_CLEARED))
|
||||
if (kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
|
||||
cr0 &= ~(X86_CR0_CD | X86_CR0_NW);
|
||||
svm->vmcb->save.cr0 = cr0;
|
||||
mark_dirty(svm->vmcb, VMCB_CR);
|
||||
|
|
|
@ -8650,7 +8650,10 @@ static u64 vmx_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio)
|
|||
|
||||
if (kvm_read_cr0(vcpu) & X86_CR0_CD) {
|
||||
ipat = VMX_EPT_IPAT_BIT;
|
||||
cache = MTRR_TYPE_UNCACHABLE;
|
||||
if (kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
|
||||
cache = MTRR_TYPE_WRBACK;
|
||||
else
|
||||
cache = MTRR_TYPE_UNCACHABLE;
|
||||
goto exit;
|
||||
}
|
||||
|
||||
|
|
|
@ -147,6 +147,11 @@ static inline void kvm_register_writel(struct kvm_vcpu *vcpu,
|
|||
return kvm_register_write(vcpu, reg, val);
|
||||
}
|
||||
|
||||
static inline bool kvm_check_has_quirk(struct kvm *kvm, u64 quirk)
|
||||
{
|
||||
return !(kvm->arch.disabled_quirks & quirk);
|
||||
}
|
||||
|
||||
void kvm_before_handle_nmi(struct kvm_vcpu *vcpu);
|
||||
void kvm_after_handle_nmi(struct kvm_vcpu *vcpu);
|
||||
void kvm_set_pending_timer(struct kvm_vcpu *vcpu);
|
||||
|
|
|
@ -63,8 +63,6 @@ static int __ioremap_check_ram(unsigned long start_pfn, unsigned long nr_pages,
|
|||
!PageReserved(pfn_to_page(start_pfn + i)))
|
||||
return 1;
|
||||
|
||||
WARN_ONCE(1, "ioremap on RAM pfn 0x%lx\n", start_pfn);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -94,7 +92,6 @@ static void __iomem *__ioremap_caller(resource_size_t phys_addr,
|
|||
pgprot_t prot;
|
||||
int retval;
|
||||
void __iomem *ret_addr;
|
||||
int ram_region;
|
||||
|
||||
/* Don't allow wraparound or zero size */
|
||||
last_addr = phys_addr + size - 1;
|
||||
|
@ -117,23 +114,15 @@ static void __iomem *__ioremap_caller(resource_size_t phys_addr,
|
|||
/*
|
||||
* Don't allow anybody to remap normal RAM that we're using..
|
||||
*/
|
||||
/* First check if whole region can be identified as RAM or not */
|
||||
ram_region = region_is_ram(phys_addr, size);
|
||||
if (ram_region > 0) {
|
||||
WARN_ONCE(1, "ioremap on RAM at 0x%lx - 0x%lx\n",
|
||||
(unsigned long int)phys_addr,
|
||||
(unsigned long int)last_addr);
|
||||
pfn = phys_addr >> PAGE_SHIFT;
|
||||
last_pfn = last_addr >> PAGE_SHIFT;
|
||||
if (walk_system_ram_range(pfn, last_pfn - pfn + 1, NULL,
|
||||
__ioremap_check_ram) == 1) {
|
||||
WARN_ONCE(1, "ioremap on RAM at %pa - %pa\n",
|
||||
&phys_addr, &last_addr);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/* If could not be identified(-1), check page by page */
|
||||
if (ram_region < 0) {
|
||||
pfn = phys_addr >> PAGE_SHIFT;
|
||||
last_pfn = last_addr >> PAGE_SHIFT;
|
||||
if (walk_system_ram_range(pfn, last_pfn - pfn + 1, NULL,
|
||||
__ioremap_check_ram) == 1)
|
||||
return NULL;
|
||||
}
|
||||
/*
|
||||
* Mappings have to be page-aligned
|
||||
*/
|
||||
|
|
|
@ -126,3 +126,10 @@ void arch_pick_mmap_layout(struct mm_struct *mm)
|
|||
mm->get_unmapped_area = arch_get_unmapped_area_topdown;
|
||||
}
|
||||
}
|
||||
|
||||
const char *arch_vma_name(struct vm_area_struct *vma)
|
||||
{
|
||||
if (vma->vm_flags & VM_MPX)
|
||||
return "[mpx]";
|
||||
return NULL;
|
||||
}
|
||||
|
|
|
@ -20,20 +20,6 @@
|
|||
#define CREATE_TRACE_POINTS
|
||||
#include <asm/trace/mpx.h>
|
||||
|
||||
static const char *mpx_mapping_name(struct vm_area_struct *vma)
|
||||
{
|
||||
return "[mpx]";
|
||||
}
|
||||
|
||||
static struct vm_operations_struct mpx_vma_ops = {
|
||||
.name = mpx_mapping_name,
|
||||
};
|
||||
|
||||
static int is_mpx_vma(struct vm_area_struct *vma)
|
||||
{
|
||||
return (vma->vm_ops == &mpx_vma_ops);
|
||||
}
|
||||
|
||||
static inline unsigned long mpx_bd_size_bytes(struct mm_struct *mm)
|
||||
{
|
||||
if (is_64bit_mm(mm))
|
||||
|
@ -53,9 +39,6 @@ static inline unsigned long mpx_bt_size_bytes(struct mm_struct *mm)
|
|||
/*
|
||||
* This is really a simplified "vm_mmap". it only handles MPX
|
||||
* bounds tables (the bounds directory is user-allocated).
|
||||
*
|
||||
* Later on, we use the vma->vm_ops to uniquely identify these
|
||||
* VMAs.
|
||||
*/
|
||||
static unsigned long mpx_mmap(unsigned long len)
|
||||
{
|
||||
|
@ -101,7 +84,6 @@ static unsigned long mpx_mmap(unsigned long len)
|
|||
ret = -ENOMEM;
|
||||
goto out;
|
||||
}
|
||||
vma->vm_ops = &mpx_vma_ops;
|
||||
|
||||
if (vm_flags & VM_LOCKED) {
|
||||
up_write(&mm->mmap_sem);
|
||||
|
@ -812,7 +794,7 @@ static noinline int zap_bt_entries_mapping(struct mm_struct *mm,
|
|||
* so stop immediately and return an error. This
|
||||
* probably results in a SIGSEGV.
|
||||
*/
|
||||
if (!is_mpx_vma(vma))
|
||||
if (!(vma->vm_flags & VM_MPX))
|
||||
return -EINVAL;
|
||||
|
||||
len = min(vma->vm_end, end) - addr;
|
||||
|
@ -945,9 +927,9 @@ static int try_unmap_single_bt(struct mm_struct *mm,
|
|||
* lots of tables even though we have no actual table
|
||||
* entries in use.
|
||||
*/
|
||||
while (next && is_mpx_vma(next))
|
||||
while (next && (next->vm_flags & VM_MPX))
|
||||
next = next->vm_next;
|
||||
while (prev && is_mpx_vma(prev))
|
||||
while (prev && (prev->vm_flags & VM_MPX))
|
||||
prev = prev->vm_prev;
|
||||
/*
|
||||
* We know 'start' and 'end' lie within an area controlled
|
||||
|
|
|
@ -117,7 +117,7 @@ static void flush_tlb_func(void *info)
|
|||
} else {
|
||||
unsigned long addr;
|
||||
unsigned long nr_pages =
|
||||
f->flush_end - f->flush_start / PAGE_SIZE;
|
||||
(f->flush_end - f->flush_start) / PAGE_SIZE;
|
||||
addr = f->flush_start;
|
||||
while (addr < f->flush_end) {
|
||||
__flush_tlb_single(addr);
|
||||
|
|
17
block/bio.c
17
block/bio.c
|
@ -1831,8 +1831,9 @@ EXPORT_SYMBOL(bio_endio);
|
|||
* Allocates and returns a new bio which represents @sectors from the start of
|
||||
* @bio, and updates @bio to represent the remaining sectors.
|
||||
*
|
||||
* The newly allocated bio will point to @bio's bi_io_vec; it is the caller's
|
||||
* responsibility to ensure that @bio is not freed before the split.
|
||||
* Unless this is a discard request the newly allocated bio will point
|
||||
* to @bio's bi_io_vec; it is the caller's responsibility to ensure that
|
||||
* @bio is not freed before the split.
|
||||
*/
|
||||
struct bio *bio_split(struct bio *bio, int sectors,
|
||||
gfp_t gfp, struct bio_set *bs)
|
||||
|
@ -1842,7 +1843,15 @@ struct bio *bio_split(struct bio *bio, int sectors,
|
|||
BUG_ON(sectors <= 0);
|
||||
BUG_ON(sectors >= bio_sectors(bio));
|
||||
|
||||
split = bio_clone_fast(bio, gfp, bs);
|
||||
/*
|
||||
* Discards need a mutable bio_vec to accommodate the payload
|
||||
* required by the DSM TRIM and UNMAP commands.
|
||||
*/
|
||||
if (bio->bi_rw & REQ_DISCARD)
|
||||
split = bio_clone_bioset(bio, gfp, bs);
|
||||
else
|
||||
split = bio_clone_fast(bio, gfp, bs);
|
||||
|
||||
if (!split)
|
||||
return NULL;
|
||||
|
||||
|
@ -2009,6 +2018,7 @@ int bio_associate_blkcg(struct bio *bio, struct cgroup_subsys_state *blkcg_css)
|
|||
bio->bi_css = blkcg_css;
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(bio_associate_blkcg);
|
||||
|
||||
/**
|
||||
* bio_associate_current - associate a bio with %current
|
||||
|
@ -2039,6 +2049,7 @@ int bio_associate_current(struct bio *bio)
|
|||
bio->bi_css = task_get_css(current, blkio_cgrp_id);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(bio_associate_current);
|
||||
|
||||
/**
|
||||
* bio_disassociate_task - undo bio_associate_current()
|
||||
|
|
|
@ -718,8 +718,12 @@ int blkg_conf_prep(struct blkcg *blkcg, const struct blkcg_policy *pol,
|
|||
return -EINVAL;
|
||||
|
||||
disk = get_gendisk(MKDEV(major, minor), &part);
|
||||
if (!disk || part)
|
||||
if (!disk)
|
||||
return -EINVAL;
|
||||
if (part) {
|
||||
put_disk(disk);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
rcu_read_lock();
|
||||
spin_lock_irq(disk->queue->queue_lock);
|
||||
|
|
|
@ -2478,6 +2478,10 @@ int ata_dev_configure(struct ata_device *dev)
|
|||
dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128,
|
||||
dev->max_sectors);
|
||||
|
||||
if (dev->horkage & ATA_HORKAGE_MAX_SEC_1024)
|
||||
dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_1024,
|
||||
dev->max_sectors);
|
||||
|
||||
if (dev->horkage & ATA_HORKAGE_MAX_SEC_LBA48)
|
||||
dev->max_sectors = ATA_MAX_SECTORS_LBA48;
|
||||
|
||||
|
@ -4146,6 +4150,12 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
|
|||
{ "Slimtype DVD A DS8A8SH", NULL, ATA_HORKAGE_MAX_SEC_LBA48 },
|
||||
{ "Slimtype DVD A DS8A9SH", NULL, ATA_HORKAGE_MAX_SEC_LBA48 },
|
||||
|
||||
/*
|
||||
* Causes silent data corruption with higher max sects.
|
||||
* http://lkml.kernel.org/g/x49wpy40ysk.fsf@segfault.boston.devel.redhat.com
|
||||
*/
|
||||
{ "ST380013AS", "3.20", ATA_HORKAGE_MAX_SEC_1024 },
|
||||
|
||||
/* Devices we expect to fail diagnostics */
|
||||
|
||||
/* Devices where NCQ should be avoided */
|
||||
|
@ -4174,9 +4184,10 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
|
|||
{ "ST3320[68]13AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
|
||||
ATA_HORKAGE_FIRMWARE_WARN },
|
||||
|
||||
/* Seagate Momentus SpinPoint M8 seem to have FPMDA_AA issues */
|
||||
/* drives which fail FPDMA_AA activation (some may freeze afterwards) */
|
||||
{ "ST1000LM024 HN-M101MBB", "2AR10001", ATA_HORKAGE_BROKEN_FPDMA_AA },
|
||||
{ "ST1000LM024 HN-M101MBB", "2BA30001", ATA_HORKAGE_BROKEN_FPDMA_AA },
|
||||
{ "VB0250EAVER", "HPG7", ATA_HORKAGE_BROKEN_FPDMA_AA },
|
||||
|
||||
/* Blacklist entries taken from Silicon Image 3124/3132
|
||||
Windows driver .inf file - also several Linux problem reports */
|
||||
|
@ -4229,7 +4240,7 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
|
|||
ATA_HORKAGE_ZERO_AFTER_TRIM, },
|
||||
{ "Crucial_CT*M500*", NULL, ATA_HORKAGE_NO_NCQ_TRIM |
|
||||
ATA_HORKAGE_ZERO_AFTER_TRIM, },
|
||||
{ "Micron_M5[15]0*", "MU01", ATA_HORKAGE_NO_NCQ_TRIM |
|
||||
{ "Micron_M5[15]0_*", "MU01", ATA_HORKAGE_NO_NCQ_TRIM |
|
||||
ATA_HORKAGE_ZERO_AFTER_TRIM, },
|
||||
{ "Crucial_CT*M550*", "MU01", ATA_HORKAGE_NO_NCQ_TRIM |
|
||||
ATA_HORKAGE_ZERO_AFTER_TRIM, },
|
||||
|
@ -4238,6 +4249,9 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
|
|||
{ "Samsung SSD 8*", NULL, ATA_HORKAGE_NO_NCQ_TRIM |
|
||||
ATA_HORKAGE_ZERO_AFTER_TRIM, },
|
||||
|
||||
/* devices that don't properly handle TRIM commands */
|
||||
{ "SuperSSpeed S238*", NULL, ATA_HORKAGE_NOTRIM, },
|
||||
|
||||
/*
|
||||
* As defined, the DRAT (Deterministic Read After Trim) and RZAT
|
||||
* (Return Zero After Trim) flags in the ATA Command Set are
|
||||
|
@ -4501,7 +4515,8 @@ static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
|
|||
else /* In the ancient relic department - skip all of this */
|
||||
return 0;
|
||||
|
||||
err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
|
||||
/* On some disks, this command causes spin-up, so we need longer timeout */
|
||||
err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 15000);
|
||||
|
||||
DPRINTK("EXIT, err_mask=%x\n", err_mask);
|
||||
return err_mask;
|
||||
|
|
|
@ -460,6 +460,13 @@ static void sata_pmp_quirks(struct ata_port *ap)
|
|||
ATA_LFLAG_NO_SRST |
|
||||
ATA_LFLAG_ASSUME_ATA;
|
||||
}
|
||||
} else if (vendor == 0x11ab && devid == 0x4140) {
|
||||
/* Marvell 4140 quirks */
|
||||
ata_for_each_link(link, ap, EDGE) {
|
||||
/* port 4 is for SEMB device and it doesn't like SRST */
|
||||
if (link->pmp == 4)
|
||||
link->flags |= ATA_LFLAG_DISABLED;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -2568,7 +2568,8 @@ static unsigned int ata_scsiop_read_cap(struct ata_scsi_args *args, u8 *rbuf)
|
|||
rbuf[14] = (lowest_aligned >> 8) & 0x3f;
|
||||
rbuf[15] = lowest_aligned;
|
||||
|
||||
if (ata_id_has_trim(args->id)) {
|
||||
if (ata_id_has_trim(args->id) &&
|
||||
!(dev->horkage & ATA_HORKAGE_NOTRIM)) {
|
||||
rbuf[14] |= 0x80; /* LBPME */
|
||||
|
||||
if (ata_id_has_zero_after_trim(args->id) &&
|
||||
|
|
|
@ -569,6 +569,8 @@ show_ata_dev_trim(struct device *dev,
|
|||
|
||||
if (!ata_id_has_trim(ata_dev->id))
|
||||
mode = "unsupported";
|
||||
else if (ata_dev->horkage & ATA_HORKAGE_NOTRIM)
|
||||
mode = "forced_unsupported";
|
||||
else if (ata_dev->horkage & ATA_HORKAGE_NO_NCQ_TRIM)
|
||||
mode = "forced_unqueued";
|
||||
else if (ata_fpdma_dsm_supported(ata_dev))
|
||||
|
|
|
@ -240,19 +240,19 @@ static enum hrtimer_restart null_cmd_timer_expired(struct hrtimer *timer)
|
|||
while ((entry = llist_del_all(&cq->list)) != NULL) {
|
||||
entry = llist_reverse_order(entry);
|
||||
do {
|
||||
struct request_queue *q = NULL;
|
||||
|
||||
cmd = container_of(entry, struct nullb_cmd, ll_list);
|
||||
entry = entry->next;
|
||||
if (cmd->rq)
|
||||
q = cmd->rq->q;
|
||||
end_cmd(cmd);
|
||||
|
||||
if (cmd->rq) {
|
||||
struct request_queue *q = cmd->rq->q;
|
||||
|
||||
if (!q->mq_ops && blk_queue_stopped(q)) {
|
||||
spin_lock(q->queue_lock);
|
||||
if (blk_queue_stopped(q))
|
||||
blk_start_queue(q);
|
||||
spin_unlock(q->queue_lock);
|
||||
}
|
||||
if (q && !q->mq_ops && blk_queue_stopped(q)) {
|
||||
spin_lock(q->queue_lock);
|
||||
if (blk_queue_stopped(q))
|
||||
blk_start_queue(q);
|
||||
spin_unlock(q->queue_lock);
|
||||
}
|
||||
} while (entry);
|
||||
}
|
||||
|
|
|
@ -472,12 +472,11 @@ int btbcm_setup_apple(struct hci_dev *hdev)
|
|||
|
||||
/* Read Verbose Config Version Info */
|
||||
skb = btbcm_read_verbose_config(hdev);
|
||||
if (IS_ERR(skb))
|
||||
return PTR_ERR(skb);
|
||||
|
||||
BT_INFO("%s: BCM: chip id %u build %4.4u", hdev->name, skb->data[1],
|
||||
get_unaligned_le16(skb->data + 5));
|
||||
kfree_skb(skb);
|
||||
if (!IS_ERR(skb)) {
|
||||
BT_INFO("%s: BCM: chip id %u build %4.4u", hdev->name, skb->data[1],
|
||||
get_unaligned_le16(skb->data + 5));
|
||||
kfree_skb(skb);
|
||||
}
|
||||
|
||||
set_bit(HCI_QUIRK_STRICT_DUPLICATE_FILTER, &hdev->quirks);
|
||||
|
||||
|
|
|
@ -305,10 +305,17 @@ const char *cper_mem_err_unpack(struct trace_seq *p,
|
|||
return ret;
|
||||
}
|
||||
|
||||
static void cper_print_mem(const char *pfx, const struct cper_sec_mem_err *mem)
|
||||
static void cper_print_mem(const char *pfx, const struct cper_sec_mem_err *mem,
|
||||
int len)
|
||||
{
|
||||
struct cper_mem_err_compact cmem;
|
||||
|
||||
/* Don't trust UEFI 2.1/2.2 structure with bad validation bits */
|
||||
if (len == sizeof(struct cper_sec_mem_err_old) &&
|
||||
(mem->validation_bits & ~(CPER_MEM_VALID_RANK_NUMBER - 1))) {
|
||||
pr_err(FW_WARN "valid bits set for fields beyond structure\n");
|
||||
return;
|
||||
}
|
||||
if (mem->validation_bits & CPER_MEM_VALID_ERROR_STATUS)
|
||||
printk("%s""error_status: 0x%016llx\n", pfx, mem->error_status);
|
||||
if (mem->validation_bits & CPER_MEM_VALID_PA)
|
||||
|
@ -405,8 +412,10 @@ static void cper_estatus_print_section(
|
|||
} else if (!uuid_le_cmp(*sec_type, CPER_SEC_PLATFORM_MEM)) {
|
||||
struct cper_sec_mem_err *mem_err = (void *)(gdata + 1);
|
||||
printk("%s""section_type: memory error\n", newpfx);
|
||||
if (gdata->error_data_length >= sizeof(*mem_err))
|
||||
cper_print_mem(newpfx, mem_err);
|
||||
if (gdata->error_data_length >=
|
||||
sizeof(struct cper_sec_mem_err_old))
|
||||
cper_print_mem(newpfx, mem_err,
|
||||
gdata->error_data_length);
|
||||
else
|
||||
goto err_section_too_small;
|
||||
} else if (!uuid_le_cmp(*sec_type, CPER_SEC_PCIE)) {
|
||||
|
|
|
@ -1614,6 +1614,9 @@ struct amdgpu_uvd {
|
|||
#define AMDGPU_MAX_VCE_HANDLES 16
|
||||
#define AMDGPU_VCE_FIRMWARE_OFFSET 256
|
||||
|
||||
#define AMDGPU_VCE_HARVEST_VCE0 (1 << 0)
|
||||
#define AMDGPU_VCE_HARVEST_VCE1 (1 << 1)
|
||||
|
||||
struct amdgpu_vce {
|
||||
struct amdgpu_bo *vcpu_bo;
|
||||
uint64_t gpu_addr;
|
||||
|
@ -1626,6 +1629,7 @@ struct amdgpu_vce {
|
|||
const struct firmware *fw; /* VCE firmware */
|
||||
struct amdgpu_ring ring[AMDGPU_MAX_VCE_RINGS];
|
||||
struct amdgpu_irq_src irq;
|
||||
unsigned harvest_config;
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
|
@ -459,6 +459,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
|
|||
memcpy(&dev_info.cu_bitmap[0], &cu_info.bitmap[0], sizeof(cu_info.bitmap));
|
||||
dev_info.vram_type = adev->mc.vram_type;
|
||||
dev_info.vram_bit_width = adev->mc.vram_width;
|
||||
dev_info.vce_harvest_config = adev->vce.harvest_config;
|
||||
|
||||
return copy_to_user(out, &dev_info,
|
||||
min((size_t)size, sizeof(dev_info))) ? -EFAULT : 0;
|
||||
|
|
|
@ -494,29 +494,67 @@ static void cz_dpm_fini(struct amdgpu_device *adev)
|
|||
amdgpu_free_extended_power_table(adev);
|
||||
}
|
||||
|
||||
#define ixSMUSVI_NB_CURRENTVID 0xD8230044
|
||||
#define CURRENT_NB_VID_MASK 0xff000000
|
||||
#define CURRENT_NB_VID__SHIFT 24
|
||||
#define ixSMUSVI_GFX_CURRENTVID 0xD8230048
|
||||
#define CURRENT_GFX_VID_MASK 0xff000000
|
||||
#define CURRENT_GFX_VID__SHIFT 24
|
||||
|
||||
static void
|
||||
cz_dpm_debugfs_print_current_performance_level(struct amdgpu_device *adev,
|
||||
struct seq_file *m)
|
||||
{
|
||||
struct cz_power_info *pi = cz_get_pi(adev);
|
||||
struct amdgpu_clock_voltage_dependency_table *table =
|
||||
&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
|
||||
u32 current_index =
|
||||
(RREG32_SMC(ixTARGET_AND_CURRENT_PROFILE_INDEX) &
|
||||
TARGET_AND_CURRENT_PROFILE_INDEX__CURR_SCLK_INDEX_MASK) >>
|
||||
TARGET_AND_CURRENT_PROFILE_INDEX__CURR_SCLK_INDEX__SHIFT;
|
||||
u32 sclk, tmp;
|
||||
u16 vddc;
|
||||
struct amdgpu_uvd_clock_voltage_dependency_table *uvd_table =
|
||||
&adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table;
|
||||
struct amdgpu_vce_clock_voltage_dependency_table *vce_table =
|
||||
&adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table;
|
||||
u32 sclk_index = REG_GET_FIELD(RREG32_SMC(ixTARGET_AND_CURRENT_PROFILE_INDEX),
|
||||
TARGET_AND_CURRENT_PROFILE_INDEX, CURR_SCLK_INDEX);
|
||||
u32 uvd_index = REG_GET_FIELD(RREG32_SMC(ixTARGET_AND_CURRENT_PROFILE_INDEX_2),
|
||||
TARGET_AND_CURRENT_PROFILE_INDEX_2, CURR_UVD_INDEX);
|
||||
u32 vce_index = REG_GET_FIELD(RREG32_SMC(ixTARGET_AND_CURRENT_PROFILE_INDEX_2),
|
||||
TARGET_AND_CURRENT_PROFILE_INDEX_2, CURR_VCE_INDEX);
|
||||
u32 sclk, vclk, dclk, ecclk, tmp;
|
||||
u16 vddnb, vddgfx;
|
||||
|
||||
if (current_index >= NUM_SCLK_LEVELS) {
|
||||
seq_printf(m, "invalid dpm profile %d\n", current_index);
|
||||
if (sclk_index >= NUM_SCLK_LEVELS) {
|
||||
seq_printf(m, "invalid sclk dpm profile %d\n", sclk_index);
|
||||
} else {
|
||||
sclk = table->entries[current_index].clk;
|
||||
tmp = (RREG32_SMC(ixSMU_VOLTAGE_STATUS) &
|
||||
SMU_VOLTAGE_STATUS__SMU_VOLTAGE_CURRENT_LEVEL_MASK) >>
|
||||
SMU_VOLTAGE_STATUS__SMU_VOLTAGE_CURRENT_LEVEL__SHIFT;
|
||||
vddc = cz_convert_8bit_index_to_voltage(adev, (u16)tmp);
|
||||
seq_printf(m, "power level %d sclk: %u vddc: %u\n",
|
||||
current_index, sclk, vddc);
|
||||
sclk = table->entries[sclk_index].clk;
|
||||
seq_printf(m, "%u sclk: %u\n", sclk_index, sclk);
|
||||
}
|
||||
|
||||
tmp = (RREG32_SMC(ixSMUSVI_NB_CURRENTVID) &
|
||||
CURRENT_NB_VID_MASK) >> CURRENT_NB_VID__SHIFT;
|
||||
vddnb = cz_convert_8bit_index_to_voltage(adev, (u16)tmp);
|
||||
tmp = (RREG32_SMC(ixSMUSVI_GFX_CURRENTVID) &
|
||||
CURRENT_GFX_VID_MASK) >> CURRENT_GFX_VID__SHIFT;
|
||||
vddgfx = cz_convert_8bit_index_to_voltage(adev, (u16)tmp);
|
||||
seq_printf(m, "vddnb: %u vddgfx: %u\n", vddnb, vddgfx);
|
||||
|
||||
seq_printf(m, "uvd %sabled\n", pi->uvd_power_gated ? "dis" : "en");
|
||||
if (!pi->uvd_power_gated) {
|
||||
if (uvd_index >= CZ_MAX_HARDWARE_POWERLEVELS) {
|
||||
seq_printf(m, "invalid uvd dpm level %d\n", uvd_index);
|
||||
} else {
|
||||
vclk = uvd_table->entries[uvd_index].vclk;
|
||||
dclk = uvd_table->entries[uvd_index].dclk;
|
||||
seq_printf(m, "%u uvd vclk: %u dclk: %u\n", uvd_index, vclk, dclk);
|
||||
}
|
||||
}
|
||||
|
||||
seq_printf(m, "vce %sabled\n", pi->vce_power_gated ? "dis" : "en");
|
||||
if (!pi->vce_power_gated) {
|
||||
if (vce_index >= CZ_MAX_HARDWARE_POWERLEVELS) {
|
||||
seq_printf(m, "invalid vce dpm level %d\n", vce_index);
|
||||
} else {
|
||||
ecclk = vce_table->entries[vce_index].ecclk;
|
||||
seq_printf(m, "%u vce ecclk: %u\n", vce_index, ecclk);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -2632,6 +2632,7 @@ static void dce_v10_0_crtc_dpms(struct drm_crtc *crtc, int mode)
|
|||
struct drm_device *dev = crtc->dev;
|
||||
struct amdgpu_device *adev = dev->dev_private;
|
||||
struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
|
||||
unsigned type;
|
||||
|
||||
switch (mode) {
|
||||
case DRM_MODE_DPMS_ON:
|
||||
|
@ -2640,6 +2641,9 @@ static void dce_v10_0_crtc_dpms(struct drm_crtc *crtc, int mode)
|
|||
dce_v10_0_vga_enable(crtc, true);
|
||||
amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE);
|
||||
dce_v10_0_vga_enable(crtc, false);
|
||||
/* Make sure VBLANK interrupt is still enabled */
|
||||
type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id);
|
||||
amdgpu_irq_update(adev, &adev->crtc_irq, type);
|
||||
drm_vblank_post_modeset(dev, amdgpu_crtc->crtc_id);
|
||||
dce_v10_0_crtc_load_lut(crtc);
|
||||
break;
|
||||
|
|
|
@ -2631,6 +2631,7 @@ static void dce_v11_0_crtc_dpms(struct drm_crtc *crtc, int mode)
|
|||
struct drm_device *dev = crtc->dev;
|
||||
struct amdgpu_device *adev = dev->dev_private;
|
||||
struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
|
||||
unsigned type;
|
||||
|
||||
switch (mode) {
|
||||
case DRM_MODE_DPMS_ON:
|
||||
|
@ -2639,6 +2640,9 @@ static void dce_v11_0_crtc_dpms(struct drm_crtc *crtc, int mode)
|
|||
dce_v11_0_vga_enable(crtc, true);
|
||||
amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE);
|
||||
dce_v11_0_vga_enable(crtc, false);
|
||||
/* Make sure VBLANK interrupt is still enabled */
|
||||
type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id);
|
||||
amdgpu_irq_update(adev, &adev->crtc_irq, type);
|
||||
drm_vblank_post_modeset(dev, amdgpu_crtc->crtc_id);
|
||||
dce_v11_0_crtc_load_lut(crtc);
|
||||
break;
|
||||
|
|
|
@ -35,6 +35,8 @@
|
|||
#include "oss/oss_2_0_d.h"
|
||||
#include "oss/oss_2_0_sh_mask.h"
|
||||
#include "gca/gfx_8_0_d.h"
|
||||
#include "smu/smu_7_1_2_d.h"
|
||||
#include "smu/smu_7_1_2_sh_mask.h"
|
||||
|
||||
#define GRBM_GFX_INDEX__VCE_INSTANCE__SHIFT 0x04
|
||||
#define GRBM_GFX_INDEX__VCE_INSTANCE_MASK 0x10
|
||||
|
@ -112,6 +114,10 @@ static int vce_v3_0_start(struct amdgpu_device *adev)
|
|||
|
||||
mutex_lock(&adev->grbm_idx_mutex);
|
||||
for (idx = 0; idx < 2; ++idx) {
|
||||
|
||||
if (adev->vce.harvest_config & (1 << idx))
|
||||
continue;
|
||||
|
||||
if(idx == 0)
|
||||
WREG32_P(mmGRBM_GFX_INDEX, 0,
|
||||
~GRBM_GFX_INDEX__VCE_INSTANCE_MASK);
|
||||
|
@ -190,10 +196,52 @@ static int vce_v3_0_start(struct amdgpu_device *adev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
#define ixVCE_HARVEST_FUSE_MACRO__ADDRESS 0xC0014074
|
||||
#define VCE_HARVEST_FUSE_MACRO__SHIFT 27
|
||||
#define VCE_HARVEST_FUSE_MACRO__MASK 0x18000000
|
||||
|
||||
static unsigned vce_v3_0_get_harvest_config(struct amdgpu_device *adev)
|
||||
{
|
||||
u32 tmp;
|
||||
unsigned ret;
|
||||
|
||||
if (adev->flags & AMDGPU_IS_APU)
|
||||
tmp = (RREG32_SMC(ixVCE_HARVEST_FUSE_MACRO__ADDRESS) &
|
||||
VCE_HARVEST_FUSE_MACRO__MASK) >>
|
||||
VCE_HARVEST_FUSE_MACRO__SHIFT;
|
||||
else
|
||||
tmp = (RREG32_SMC(ixCC_HARVEST_FUSES) &
|
||||
CC_HARVEST_FUSES__VCE_DISABLE_MASK) >>
|
||||
CC_HARVEST_FUSES__VCE_DISABLE__SHIFT;
|
||||
|
||||
switch (tmp) {
|
||||
case 1:
|
||||
ret = AMDGPU_VCE_HARVEST_VCE0;
|
||||
break;
|
||||
case 2:
|
||||
ret = AMDGPU_VCE_HARVEST_VCE1;
|
||||
break;
|
||||
case 3:
|
||||
ret = AMDGPU_VCE_HARVEST_VCE0 | AMDGPU_VCE_HARVEST_VCE1;
|
||||
break;
|
||||
default:
|
||||
ret = 0;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int vce_v3_0_early_init(void *handle)
|
||||
{
|
||||
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
|
||||
|
||||
adev->vce.harvest_config = vce_v3_0_get_harvest_config(adev);
|
||||
|
||||
if ((adev->vce.harvest_config &
|
||||
(AMDGPU_VCE_HARVEST_VCE0 | AMDGPU_VCE_HARVEST_VCE1)) ==
|
||||
(AMDGPU_VCE_HARVEST_VCE0 | AMDGPU_VCE_HARVEST_VCE1))
|
||||
return -ENOENT;
|
||||
|
||||
vce_v3_0_set_ring_funcs(adev);
|
||||
vce_v3_0_set_irq_funcs(adev);
|
||||
|
||||
|
|
|
@ -355,6 +355,7 @@ int atmel_hlcdc_crtc_create(struct drm_device *dev)
|
|||
planes->overlays[i]->base.possible_crtcs = 1 << crtc->id;
|
||||
|
||||
drm_crtc_helper_add(&crtc->base, &lcdc_crtc_helper_funcs);
|
||||
drm_crtc_vblank_reset(&crtc->base);
|
||||
|
||||
dc->crtc = &crtc->base;
|
||||
|
||||
|
|
|
@ -313,6 +313,12 @@ static int atmel_hlcdc_dc_load(struct drm_device *dev)
|
|||
|
||||
pm_runtime_enable(dev->dev);
|
||||
|
||||
ret = drm_vblank_init(dev, 1);
|
||||
if (ret < 0) {
|
||||
dev_err(dev->dev, "failed to initialize vblank\n");
|
||||
goto err_periph_clk_disable;
|
||||
}
|
||||
|
||||
ret = atmel_hlcdc_dc_modeset_init(dev);
|
||||
if (ret < 0) {
|
||||
dev_err(dev->dev, "failed to initialize mode setting\n");
|
||||
|
@ -321,12 +327,6 @@ static int atmel_hlcdc_dc_load(struct drm_device *dev)
|
|||
|
||||
drm_mode_config_reset(dev);
|
||||
|
||||
ret = drm_vblank_init(dev, 1);
|
||||
if (ret < 0) {
|
||||
dev_err(dev->dev, "failed to initialize vblank\n");
|
||||
goto err_periph_clk_disable;
|
||||
}
|
||||
|
||||
pm_runtime_get_sync(dev->dev);
|
||||
ret = drm_irq_install(dev, dc->hlcdc->irq);
|
||||
pm_runtime_put_sync(dev->dev);
|
||||
|
|
|
@ -5398,12 +5398,9 @@ void drm_mode_config_reset(struct drm_device *dev)
|
|||
if (encoder->funcs->reset)
|
||||
encoder->funcs->reset(encoder);
|
||||
|
||||
list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
|
||||
connector->status = connector_status_unknown;
|
||||
|
||||
list_for_each_entry(connector, &dev->mode_config.connector_list, head)
|
||||
if (connector->funcs->reset)
|
||||
connector->funcs->reset(connector);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(drm_mode_config_reset);
|
||||
|
||||
|
|
|
@ -1274,10 +1274,12 @@ int i915_reg_read_ioctl(struct drm_device *dev,
|
|||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
struct drm_i915_reg_read *reg = data;
|
||||
struct register_whitelist const *entry = whitelist;
|
||||
unsigned size;
|
||||
u64 offset;
|
||||
int i, ret = 0;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(whitelist); i++, entry++) {
|
||||
if (entry->offset == reg->offset &&
|
||||
if (entry->offset == (reg->offset & -entry->size) &&
|
||||
(1 << INTEL_INFO(dev)->gen & entry->gen_bitmask))
|
||||
break;
|
||||
}
|
||||
|
@ -1285,23 +1287,33 @@ int i915_reg_read_ioctl(struct drm_device *dev,
|
|||
if (i == ARRAY_SIZE(whitelist))
|
||||
return -EINVAL;
|
||||
|
||||
/* We use the low bits to encode extra flags as the register should
|
||||
* be naturally aligned (and those that are not so aligned merely
|
||||
* limit the available flags for that register).
|
||||
*/
|
||||
offset = entry->offset;
|
||||
size = entry->size;
|
||||
size |= reg->offset ^ offset;
|
||||
|
||||
intel_runtime_pm_get(dev_priv);
|
||||
|
||||
switch (entry->size) {
|
||||
switch (size) {
|
||||
case 8 | 1:
|
||||
reg->val = I915_READ64_2x32(offset, offset+4);
|
||||
break;
|
||||
case 8:
|
||||
reg->val = I915_READ64(reg->offset);
|
||||
reg->val = I915_READ64(offset);
|
||||
break;
|
||||
case 4:
|
||||
reg->val = I915_READ(reg->offset);
|
||||
reg->val = I915_READ(offset);
|
||||
break;
|
||||
case 2:
|
||||
reg->val = I915_READ16(reg->offset);
|
||||
reg->val = I915_READ16(offset);
|
||||
break;
|
||||
case 1:
|
||||
reg->val = I915_READ8(reg->offset);
|
||||
reg->val = I915_READ8(offset);
|
||||
break;
|
||||
default:
|
||||
MISSING_CASE(entry->size);
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
|
|
@ -490,7 +490,8 @@ pgprot_t ttm_io_prot(uint32_t caching_flags, pgprot_t tmp)
|
|||
else if (boot_cpu_data.x86 > 3)
|
||||
tmp = pgprot_noncached(tmp);
|
||||
#endif
|
||||
#if defined(__ia64__) || defined(__arm__) || defined(__powerpc__)
|
||||
#if defined(__ia64__) || defined(__arm__) || defined(__aarch64__) || \
|
||||
defined(__powerpc__)
|
||||
if (caching_flags & TTM_PL_FLAG_WC)
|
||||
tmp = pgprot_writecombine(tmp);
|
||||
else
|
||||
|
|
|
@ -356,6 +356,8 @@ static int cp2112_read(struct cp2112_device *dev, u8 *data, size_t size)
|
|||
struct cp2112_force_read_report report;
|
||||
int ret;
|
||||
|
||||
if (size > sizeof(dev->read_data))
|
||||
size = sizeof(dev->read_data);
|
||||
report.report = CP2112_DATA_READ_FORCE_SEND;
|
||||
report.length = cpu_to_be16(size);
|
||||
|
||||
|
|
|
@ -778,9 +778,16 @@ static int mt_input_mapping(struct hid_device *hdev, struct hid_input *hi,
|
|||
/*
|
||||
* some egalax touchscreens have "application == HID_DG_TOUCHSCREEN"
|
||||
* for the stylus.
|
||||
* The check for mt_report_id ensures we don't process
|
||||
* HID_DG_CONTACTCOUNT from the pen report as it is outside the physical
|
||||
* collection, but within the report ID.
|
||||
*/
|
||||
if (field->physical == HID_DG_STYLUS)
|
||||
return 0;
|
||||
else if ((field->physical == 0) &&
|
||||
(field->report->id != td->mt_report_id) &&
|
||||
(td->mt_report_id != -1))
|
||||
return 0;
|
||||
|
||||
if (field->application == HID_DG_TOUCHSCREEN ||
|
||||
field->application == HID_DG_TOUCHPAD)
|
||||
|
|
|
@ -87,6 +87,9 @@ static const struct hid_blacklist {
|
|||
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_MOUSE_C05A, HID_QUIRK_ALWAYS_POLL },
|
||||
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_MOUSE_C06A, HID_QUIRK_ALWAYS_POLL },
|
||||
{ USB_VENDOR_ID_MGE, USB_DEVICE_ID_MGE_UPS, HID_QUIRK_NOGET },
|
||||
{ USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_SURFACE_PRO_2, HID_QUIRK_NO_INIT_REPORTS },
|
||||
{ USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_2, HID_QUIRK_NO_INIT_REPORTS },
|
||||
{ USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TOUCH_COVER_2, HID_QUIRK_NO_INIT_REPORTS },
|
||||
{ USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3, HID_QUIRK_NO_INIT_REPORTS },
|
||||
{ USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3_JP, HID_QUIRK_NO_INIT_REPORTS },
|
||||
{ USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_POWER_COVER, HID_QUIRK_NO_INIT_REPORTS },
|
||||
|
|
|
@ -1271,11 +1271,13 @@ static int wacom_register_inputs(struct wacom *wacom)
|
|||
pad_input_dev = NULL;
|
||||
wacom_wac->pad_registered = false;
|
||||
fail_register_pad_input:
|
||||
input_unregister_device(touch_input_dev);
|
||||
if (touch_input_dev)
|
||||
input_unregister_device(touch_input_dev);
|
||||
wacom_wac->touch_input = NULL;
|
||||
wacom_wac->touch_registered = false;
|
||||
fail_register_touch_input:
|
||||
input_unregister_device(pen_input_dev);
|
||||
if (pen_input_dev)
|
||||
input_unregister_device(pen_input_dev);
|
||||
wacom_wac->pen_input = NULL;
|
||||
wacom_wac->pen_registered = false;
|
||||
fail_register_pen_input:
|
||||
|
|
|
@ -2213,6 +2213,9 @@ void wacom_setup_device_quirks(struct wacom *wacom)
|
|||
features->x_max = 4096;
|
||||
features->y_max = 4096;
|
||||
}
|
||||
else if (features->pktlen == WACOM_PKGLEN_BBTOUCH) {
|
||||
features->device_type |= WACOM_DEVICETYPE_PAD;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -557,21 +557,21 @@ static void mma8452_transient_interrupt(struct iio_dev *indio_dev)
|
|||
if (src & MMA8452_TRANSIENT_SRC_XTRANSE)
|
||||
iio_push_event(indio_dev,
|
||||
IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
|
||||
IIO_EV_TYPE_THRESH,
|
||||
IIO_EV_TYPE_MAG,
|
||||
IIO_EV_DIR_RISING),
|
||||
ts);
|
||||
|
||||
if (src & MMA8452_TRANSIENT_SRC_YTRANSE)
|
||||
iio_push_event(indio_dev,
|
||||
IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_Y,
|
||||
IIO_EV_TYPE_THRESH,
|
||||
IIO_EV_TYPE_MAG,
|
||||
IIO_EV_DIR_RISING),
|
||||
ts);
|
||||
|
||||
if (src & MMA8452_TRANSIENT_SRC_ZTRANSE)
|
||||
iio_push_event(indio_dev,
|
||||
IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_Z,
|
||||
IIO_EV_TYPE_THRESH,
|
||||
IIO_EV_TYPE_MAG,
|
||||
IIO_EV_DIR_RISING),
|
||||
ts);
|
||||
}
|
||||
|
@ -644,7 +644,7 @@ static int mma8452_reg_access_dbg(struct iio_dev *indio_dev,
|
|||
|
||||
static const struct iio_event_spec mma8452_transient_event[] = {
|
||||
{
|
||||
.type = IIO_EV_TYPE_THRESH,
|
||||
.type = IIO_EV_TYPE_MAG,
|
||||
.dir = IIO_EV_DIR_RISING,
|
||||
.mask_separate = BIT(IIO_EV_INFO_ENABLE),
|
||||
.mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
|
||||
|
|
|
@ -299,6 +299,8 @@ static int mcp320x_probe(struct spi_device *spi)
|
|||
indio_dev->channels = chip_info->channels;
|
||||
indio_dev->num_channels = chip_info->num_channels;
|
||||
|
||||
adc->chip_info = chip_info;
|
||||
|
||||
adc->transfer[0].tx_buf = &adc->tx_buf;
|
||||
adc->transfer[0].len = sizeof(adc->tx_buf);
|
||||
adc->transfer[1].rx_buf = adc->rx_buf;
|
||||
|
|
|
@ -635,7 +635,7 @@ static int vf610_adc_reg_access(struct iio_dev *indio_dev,
|
|||
struct vf610_adc *info = iio_priv(indio_dev);
|
||||
|
||||
if ((readval == NULL) ||
|
||||
(!(reg % 4) || (reg > VF610_REG_ADC_PCTL)))
|
||||
((reg % 4) || (reg > VF610_REG_ADC_PCTL)))
|
||||
return -EINVAL;
|
||||
|
||||
*readval = readl(info->regs + reg);
|
||||
|
|
|
@ -200,7 +200,7 @@ static int stk3310_read_event(struct iio_dev *indio_dev,
|
|||
int *val, int *val2)
|
||||
{
|
||||
u8 reg;
|
||||
u16 buf;
|
||||
__be16 buf;
|
||||
int ret;
|
||||
struct stk3310_data *data = iio_priv(indio_dev);
|
||||
|
||||
|
@ -222,7 +222,7 @@ static int stk3310_read_event(struct iio_dev *indio_dev,
|
|||
dev_err(&data->client->dev, "register read failed\n");
|
||||
return ret;
|
||||
}
|
||||
*val = swab16(buf);
|
||||
*val = be16_to_cpu(buf);
|
||||
|
||||
return IIO_VAL_INT;
|
||||
}
|
||||
|
@ -235,7 +235,7 @@ static int stk3310_write_event(struct iio_dev *indio_dev,
|
|||
int val, int val2)
|
||||
{
|
||||
u8 reg;
|
||||
u16 buf;
|
||||
__be16 buf;
|
||||
int ret;
|
||||
unsigned int index;
|
||||
struct stk3310_data *data = iio_priv(indio_dev);
|
||||
|
@ -252,7 +252,7 @@ static int stk3310_write_event(struct iio_dev *indio_dev,
|
|||
else
|
||||
return -EINVAL;
|
||||
|
||||
buf = swab16(val);
|
||||
buf = cpu_to_be16(val);
|
||||
ret = regmap_bulk_write(data->regmap, reg, &buf, 2);
|
||||
if (ret < 0)
|
||||
dev_err(&client->dev, "failed to set PS threshold!\n");
|
||||
|
@ -301,7 +301,7 @@ static int stk3310_read_raw(struct iio_dev *indio_dev,
|
|||
int *val, int *val2, long mask)
|
||||
{
|
||||
u8 reg;
|
||||
u16 buf;
|
||||
__be16 buf;
|
||||
int ret;
|
||||
unsigned int index;
|
||||
struct stk3310_data *data = iio_priv(indio_dev);
|
||||
|
@ -322,7 +322,7 @@ static int stk3310_read_raw(struct iio_dev *indio_dev,
|
|||
mutex_unlock(&data->lock);
|
||||
return ret;
|
||||
}
|
||||
*val = swab16(buf);
|
||||
*val = be16_to_cpu(buf);
|
||||
mutex_unlock(&data->lock);
|
||||
return IIO_VAL_INT;
|
||||
case IIO_CHAN_INFO_INT_TIME:
|
||||
|
@ -608,13 +608,7 @@ static int stk3310_probe(struct i2c_client *client,
|
|||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = iio_device_register(indio_dev);
|
||||
if (ret < 0) {
|
||||
dev_err(&client->dev, "device_register failed\n");
|
||||
stk3310_set_state(data, STK3310_STATE_STANDBY);
|
||||
}
|
||||
|
||||
if (client->irq <= 0)
|
||||
if (client->irq < 0)
|
||||
client->irq = stk3310_gpio_probe(client);
|
||||
|
||||
if (client->irq >= 0) {
|
||||
|
@ -629,6 +623,12 @@ static int stk3310_probe(struct i2c_client *client,
|
|||
client->irq);
|
||||
}
|
||||
|
||||
ret = iio_device_register(indio_dev);
|
||||
if (ret < 0) {
|
||||
dev_err(&client->dev, "device_register failed\n");
|
||||
stk3310_set_state(data, STK3310_STATE_STANDBY);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
@ -90,6 +90,7 @@ config IIO_ST_MAGN_SPI_3AXIS
|
|||
config BMC150_MAGN
|
||||
tristate "Bosch BMC150 Magnetometer Driver"
|
||||
depends on I2C
|
||||
select REGMAP_I2C
|
||||
select IIO_BUFFER
|
||||
select IIO_TRIGGERED_BUFFER
|
||||
help
|
||||
|
|
|
@ -706,11 +706,11 @@ static int bmc150_magn_init(struct bmc150_magn_data *data)
|
|||
goto err_poweroff;
|
||||
}
|
||||
if (chip_id != BMC150_MAGN_CHIP_ID_VAL) {
|
||||
dev_err(&data->client->dev, "Invalid chip id 0x%x\n", ret);
|
||||
dev_err(&data->client->dev, "Invalid chip id 0x%x\n", chip_id);
|
||||
ret = -ENODEV;
|
||||
goto err_poweroff;
|
||||
}
|
||||
dev_dbg(&data->client->dev, "Chip id %x\n", ret);
|
||||
dev_dbg(&data->client->dev, "Chip id %x\n", chip_id);
|
||||
|
||||
preset = bmc150_magn_presets_table[BMC150_MAGN_DEFAULT_PRESET];
|
||||
ret = bmc150_magn_set_odr(data, preset.odr);
|
||||
|
|
|
@ -202,8 +202,8 @@ static int mmc35240_hw_set(struct mmc35240_data *data, bool set)
|
|||
coil_bit = MMC35240_CTRL0_RESET_BIT;
|
||||
|
||||
return regmap_update_bits(data->regmap, MMC35240_REG_CTRL0,
|
||||
MMC35240_CTRL0_REFILL_BIT,
|
||||
coil_bit);
|
||||
coil_bit, coil_bit);
|
||||
|
||||
}
|
||||
|
||||
static int mmc35240_init(struct mmc35240_data *data)
|
||||
|
@ -222,14 +222,15 @@ static int mmc35240_init(struct mmc35240_data *data)
|
|||
|
||||
/*
|
||||
* make sure we restore sensor characteristics, by doing
|
||||
* a RESET/SET sequence
|
||||
* a SET/RESET sequence, the axis polarity being naturally
|
||||
* aligned after RESET
|
||||
*/
|
||||
ret = mmc35240_hw_set(data, false);
|
||||
ret = mmc35240_hw_set(data, true);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
usleep_range(MMC53240_WAIT_SET_RESET, MMC53240_WAIT_SET_RESET + 1);
|
||||
|
||||
ret = mmc35240_hw_set(data, true);
|
||||
ret = mmc35240_hw_set(data, false);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
|
@ -503,6 +504,7 @@ static int mmc35240_probe(struct i2c_client *client,
|
|||
}
|
||||
|
||||
data = iio_priv(indio_dev);
|
||||
i2c_set_clientdata(client, indio_dev);
|
||||
data->client = client;
|
||||
data->regmap = regmap;
|
||||
data->res = MMC35240_16_BITS_SLOW;
|
||||
|
|
|
@ -204,7 +204,7 @@ static int mlx90614_read_raw(struct iio_dev *indio_dev,
|
|||
*val = ret;
|
||||
return IIO_VAL_INT;
|
||||
case IIO_CHAN_INFO_OFFSET:
|
||||
*val = 13657;
|
||||
*val = -13657;
|
||||
*val2 = 500000;
|
||||
return IIO_VAL_INT_PLUS_MICRO;
|
||||
case IIO_CHAN_INFO_SCALE:
|
||||
|
|
|
@ -31,6 +31,8 @@
|
|||
* SOFTWARE.
|
||||
*/
|
||||
|
||||
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
|
||||
|
||||
#include <linux/sched.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/idr.h>
|
||||
|
@ -399,8 +401,8 @@ static int ipath_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|||
u32 bar0 = 0, bar1 = 0;
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
if (WARN(pat_enabled(),
|
||||
"ipath needs PAT disabled, boot with nopat kernel parameter\n")) {
|
||||
if (pat_enabled()) {
|
||||
pr_warn("ipath needs PAT disabled, boot with nopat kernel parameter\n");
|
||||
ret = -ENODEV;
|
||||
goto bail;
|
||||
}
|
||||
|
|
|
@ -71,6 +71,18 @@ static void input_leds_event(struct input_handle *handle, unsigned int type,
|
|||
{
|
||||
}
|
||||
|
||||
static int input_leds_get_count(struct input_dev *dev)
|
||||
{
|
||||
unsigned int led_code;
|
||||
int count = 0;
|
||||
|
||||
for_each_set_bit(led_code, dev->ledbit, LED_CNT)
|
||||
if (input_led_info[led_code].name)
|
||||
count++;
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
static int input_leds_connect(struct input_handler *handler,
|
||||
struct input_dev *dev,
|
||||
const struct input_device_id *id)
|
||||
|
@ -81,7 +93,7 @@ static int input_leds_connect(struct input_handler *handler,
|
|||
int led_no;
|
||||
int error;
|
||||
|
||||
num_leds = bitmap_weight(dev->ledbit, LED_CNT);
|
||||
num_leds = input_leds_get_count(dev);
|
||||
if (!num_leds)
|
||||
return -ENXIO;
|
||||
|
||||
|
@ -112,7 +124,7 @@ static int input_leds_connect(struct input_handler *handler,
|
|||
led->handle = &leds->handle;
|
||||
led->code = led_code;
|
||||
|
||||
if (WARN_ON(!input_led_info[led_code].name))
|
||||
if (!input_led_info[led_code].name)
|
||||
continue;
|
||||
|
||||
led->cdev.name = kasprintf(GFP_KERNEL, "%s::%s",
|
||||
|
|
|
@ -1167,7 +1167,7 @@ static int elantech_set_input_params(struct psmouse *psmouse)
|
|||
struct input_dev *dev = psmouse->dev;
|
||||
struct elantech_data *etd = psmouse->private;
|
||||
unsigned int x_min = 0, y_min = 0, x_max = 0, y_max = 0, width = 0;
|
||||
unsigned int x_res = 0, y_res = 0;
|
||||
unsigned int x_res = 31, y_res = 31;
|
||||
|
||||
if (elantech_set_range(psmouse, &x_min, &y_min, &x_max, &y_max, &width))
|
||||
return -1;
|
||||
|
@ -1232,8 +1232,6 @@ static int elantech_set_input_params(struct psmouse *psmouse)
|
|||
/* For X to recognize me as touchpad. */
|
||||
input_set_abs_params(dev, ABS_X, x_min, x_max, 0, 0);
|
||||
input_set_abs_params(dev, ABS_Y, y_min, y_max, 0, 0);
|
||||
input_abs_set_res(dev, ABS_X, x_res);
|
||||
input_abs_set_res(dev, ABS_Y, y_res);
|
||||
/*
|
||||
* range of pressure and width is the same as v2,
|
||||
* report ABS_PRESSURE, ABS_TOOL_WIDTH for compatibility.
|
||||
|
@ -1246,8 +1244,6 @@ static int elantech_set_input_params(struct psmouse *psmouse)
|
|||
input_mt_init_slots(dev, ETP_MAX_FINGERS, 0);
|
||||
input_set_abs_params(dev, ABS_MT_POSITION_X, x_min, x_max, 0, 0);
|
||||
input_set_abs_params(dev, ABS_MT_POSITION_Y, y_min, y_max, 0, 0);
|
||||
input_abs_set_res(dev, ABS_MT_POSITION_X, x_res);
|
||||
input_abs_set_res(dev, ABS_MT_POSITION_Y, y_res);
|
||||
input_set_abs_params(dev, ABS_MT_PRESSURE, ETP_PMIN_V2,
|
||||
ETP_PMAX_V2, 0, 0);
|
||||
/*
|
||||
|
@ -1259,6 +1255,13 @@ static int elantech_set_input_params(struct psmouse *psmouse)
|
|||
break;
|
||||
}
|
||||
|
||||
input_abs_set_res(dev, ABS_X, x_res);
|
||||
input_abs_set_res(dev, ABS_Y, y_res);
|
||||
if (etd->hw_version > 1) {
|
||||
input_abs_set_res(dev, ABS_MT_POSITION_X, x_res);
|
||||
input_abs_set_res(dev, ABS_MT_POSITION_Y, y_res);
|
||||
}
|
||||
|
||||
etd->y_max = y_max;
|
||||
etd->width = width;
|
||||
|
||||
|
|
|
@ -15,6 +15,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/dmi.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/input/mt.h>
|
||||
|
@ -34,6 +35,7 @@ struct goodix_ts_data {
|
|||
int abs_y_max;
|
||||
unsigned int max_touch_num;
|
||||
unsigned int int_trigger_type;
|
||||
bool rotated_screen;
|
||||
};
|
||||
|
||||
#define GOODIX_MAX_HEIGHT 4096
|
||||
|
@ -60,6 +62,30 @@ static const unsigned long goodix_irq_flags[] = {
|
|||
IRQ_TYPE_LEVEL_HIGH,
|
||||
};
|
||||
|
||||
/*
|
||||
* Those tablets have their coordinates origin at the bottom right
|
||||
* of the tablet, as if rotated 180 degrees
|
||||
*/
|
||||
static const struct dmi_system_id rotated_screen[] = {
|
||||
#if defined(CONFIG_DMI) && defined(CONFIG_X86)
|
||||
{
|
||||
.ident = "WinBook TW100",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "WinBook"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "TW100")
|
||||
}
|
||||
},
|
||||
{
|
||||
.ident = "WinBook TW700",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "WinBook"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "TW700")
|
||||
},
|
||||
},
|
||||
#endif
|
||||
{}
|
||||
};
|
||||
|
||||
/**
|
||||
* goodix_i2c_read - read data from a register of the i2c slave device.
|
||||
*
|
||||
|
@ -129,6 +155,11 @@ static void goodix_ts_report_touch(struct goodix_ts_data *ts, u8 *coor_data)
|
|||
int input_y = get_unaligned_le16(&coor_data[3]);
|
||||
int input_w = get_unaligned_le16(&coor_data[5]);
|
||||
|
||||
if (ts->rotated_screen) {
|
||||
input_x = ts->abs_x_max - input_x;
|
||||
input_y = ts->abs_y_max - input_y;
|
||||
}
|
||||
|
||||
input_mt_slot(ts->input_dev, id);
|
||||
input_mt_report_slot_state(ts->input_dev, MT_TOOL_FINGER, true);
|
||||
input_report_abs(ts->input_dev, ABS_MT_POSITION_X, input_x);
|
||||
|
@ -223,6 +254,11 @@ static void goodix_read_config(struct goodix_ts_data *ts)
|
|||
ts->abs_y_max = GOODIX_MAX_HEIGHT;
|
||||
ts->max_touch_num = GOODIX_MAX_CONTACTS;
|
||||
}
|
||||
|
||||
ts->rotated_screen = dmi_check_system(rotated_screen);
|
||||
if (ts->rotated_screen)
|
||||
dev_dbg(&ts->client->dev,
|
||||
"Applying '180 degrees rotated screen' quirk\n");
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -627,6 +627,9 @@ static int dmc_tsc10_init(struct usbtouch_usb *usbtouch)
|
|||
goto err_out;
|
||||
}
|
||||
|
||||
/* TSC-25 data sheet specifies a delay after the RESET command */
|
||||
msleep(150);
|
||||
|
||||
/* set coordinate output rate */
|
||||
buf[0] = buf[1] = 0xFF;
|
||||
ret = usb_control_msg(dev, usb_rcvctrlpipe (dev, 0),
|
||||
|
|
|
@ -429,7 +429,7 @@ static int zforce_read_packet(struct zforce_ts *ts, u8 *buf)
|
|||
goto unlock;
|
||||
}
|
||||
|
||||
if (buf[PAYLOAD_LENGTH] == 0) {
|
||||
if (buf[PAYLOAD_LENGTH] == 0 || buf[PAYLOAD_LENGTH] > FRAME_MAXSIZE) {
|
||||
dev_err(&client->dev, "invalid payload length: %d\n",
|
||||
buf[PAYLOAD_LENGTH]);
|
||||
ret = -EIO;
|
||||
|
|
|
@ -199,9 +199,10 @@
|
|||
* Stream table.
|
||||
*
|
||||
* Linear: Enough to cover 1 << IDR1.SIDSIZE entries
|
||||
* 2lvl: 8k L1 entries, 256 lazy entries per table (each table covers a PCI bus)
|
||||
* 2lvl: 128k L1 entries,
|
||||
* 256 lazy entries per table (each table covers a PCI bus)
|
||||
*/
|
||||
#define STRTAB_L1_SZ_SHIFT 16
|
||||
#define STRTAB_L1_SZ_SHIFT 20
|
||||
#define STRTAB_SPLIT 8
|
||||
|
||||
#define STRTAB_L1_DESC_DWORDS 1
|
||||
|
@ -269,10 +270,10 @@
|
|||
#define ARM64_TCR_TG0_SHIFT 14
|
||||
#define ARM64_TCR_TG0_MASK 0x3UL
|
||||
#define CTXDESC_CD_0_TCR_IRGN0_SHIFT 8
|
||||
#define ARM64_TCR_IRGN0_SHIFT 24
|
||||
#define ARM64_TCR_IRGN0_SHIFT 8
|
||||
#define ARM64_TCR_IRGN0_MASK 0x3UL
|
||||
#define CTXDESC_CD_0_TCR_ORGN0_SHIFT 10
|
||||
#define ARM64_TCR_ORGN0_SHIFT 26
|
||||
#define ARM64_TCR_ORGN0_SHIFT 10
|
||||
#define ARM64_TCR_ORGN0_MASK 0x3UL
|
||||
#define CTXDESC_CD_0_TCR_SH0_SHIFT 12
|
||||
#define ARM64_TCR_SH0_SHIFT 12
|
||||
|
@ -542,6 +543,9 @@ struct arm_smmu_device {
|
|||
#define ARM_SMMU_FEAT_HYP (1 << 12)
|
||||
u32 features;
|
||||
|
||||
#define ARM_SMMU_OPT_SKIP_PREFETCH (1 << 0)
|
||||
u32 options;
|
||||
|
||||
struct arm_smmu_cmdq cmdq;
|
||||
struct arm_smmu_evtq evtq;
|
||||
struct arm_smmu_priq priq;
|
||||
|
@ -602,11 +606,35 @@ struct arm_smmu_domain {
|
|||
static DEFINE_SPINLOCK(arm_smmu_devices_lock);
|
||||
static LIST_HEAD(arm_smmu_devices);
|
||||
|
||||
struct arm_smmu_option_prop {
|
||||
u32 opt;
|
||||
const char *prop;
|
||||
};
|
||||
|
||||
static struct arm_smmu_option_prop arm_smmu_options[] = {
|
||||
{ ARM_SMMU_OPT_SKIP_PREFETCH, "hisilicon,broken-prefetch-cmd" },
|
||||
{ 0, NULL},
|
||||
};
|
||||
|
||||
static struct arm_smmu_domain *to_smmu_domain(struct iommu_domain *dom)
|
||||
{
|
||||
return container_of(dom, struct arm_smmu_domain, domain);
|
||||
}
|
||||
|
||||
static void parse_driver_options(struct arm_smmu_device *smmu)
|
||||
{
|
||||
int i = 0;
|
||||
|
||||
do {
|
||||
if (of_property_read_bool(smmu->dev->of_node,
|
||||
arm_smmu_options[i].prop)) {
|
||||
smmu->options |= arm_smmu_options[i].opt;
|
||||
dev_notice(smmu->dev, "option %s\n",
|
||||
arm_smmu_options[i].prop);
|
||||
}
|
||||
} while (arm_smmu_options[++i].opt);
|
||||
}
|
||||
|
||||
/* Low-level queue manipulation functions */
|
||||
static bool queue_full(struct arm_smmu_queue *q)
|
||||
{
|
||||
|
@ -1036,7 +1064,8 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_device *smmu, u32 sid,
|
|||
arm_smmu_sync_ste_for_sid(smmu, sid);
|
||||
|
||||
/* It's likely that we'll want to use the new STE soon */
|
||||
arm_smmu_cmdq_issue_cmd(smmu, &prefetch_cmd);
|
||||
if (!(smmu->options & ARM_SMMU_OPT_SKIP_PREFETCH))
|
||||
arm_smmu_cmdq_issue_cmd(smmu, &prefetch_cmd);
|
||||
}
|
||||
|
||||
static void arm_smmu_init_bypass_stes(u64 *strtab, unsigned int nent)
|
||||
|
@ -1064,7 +1093,7 @@ static int arm_smmu_init_l2_strtab(struct arm_smmu_device *smmu, u32 sid)
|
|||
return 0;
|
||||
|
||||
size = 1 << (STRTAB_SPLIT + ilog2(STRTAB_STE_DWORDS) + 3);
|
||||
strtab = &cfg->strtab[sid >> STRTAB_SPLIT << STRTAB_L1_DESC_DWORDS];
|
||||
strtab = &cfg->strtab[(sid >> STRTAB_SPLIT) * STRTAB_L1_DESC_DWORDS];
|
||||
|
||||
desc->span = STRTAB_SPLIT + 1;
|
||||
desc->l2ptr = dma_zalloc_coherent(smmu->dev, size, &desc->l2ptr_dma,
|
||||
|
@ -2020,21 +2049,23 @@ static int arm_smmu_init_strtab_2lvl(struct arm_smmu_device *smmu)
|
|||
{
|
||||
void *strtab;
|
||||
u64 reg;
|
||||
u32 size;
|
||||
u32 size, l1size;
|
||||
int ret;
|
||||
struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg;
|
||||
|
||||
/* Calculate the L1 size, capped to the SIDSIZE */
|
||||
size = STRTAB_L1_SZ_SHIFT - (ilog2(STRTAB_L1_DESC_DWORDS) + 3);
|
||||
size = min(size, smmu->sid_bits - STRTAB_SPLIT);
|
||||
if (size + STRTAB_SPLIT < smmu->sid_bits)
|
||||
cfg->num_l1_ents = 1 << size;
|
||||
|
||||
size += STRTAB_SPLIT;
|
||||
if (size < smmu->sid_bits)
|
||||
dev_warn(smmu->dev,
|
||||
"2-level strtab only covers %u/%u bits of SID\n",
|
||||
size + STRTAB_SPLIT, smmu->sid_bits);
|
||||
size, smmu->sid_bits);
|
||||
|
||||
cfg->num_l1_ents = 1 << size;
|
||||
size = cfg->num_l1_ents * (STRTAB_L1_DESC_DWORDS << 3);
|
||||
strtab = dma_zalloc_coherent(smmu->dev, size, &cfg->strtab_dma,
|
||||
l1size = cfg->num_l1_ents * (STRTAB_L1_DESC_DWORDS << 3);
|
||||
strtab = dma_zalloc_coherent(smmu->dev, l1size, &cfg->strtab_dma,
|
||||
GFP_KERNEL);
|
||||
if (!strtab) {
|
||||
dev_err(smmu->dev,
|
||||
|
@ -2055,8 +2086,7 @@ static int arm_smmu_init_strtab_2lvl(struct arm_smmu_device *smmu)
|
|||
ret = arm_smmu_init_l1_strtab(smmu);
|
||||
if (ret)
|
||||
dma_free_coherent(smmu->dev,
|
||||
cfg->num_l1_ents *
|
||||
(STRTAB_L1_DESC_DWORDS << 3),
|
||||
l1size,
|
||||
strtab,
|
||||
cfg->strtab_dma);
|
||||
return ret;
|
||||
|
@ -2573,6 +2603,8 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev)
|
|||
if (irq > 0)
|
||||
smmu->gerr_irq = irq;
|
||||
|
||||
parse_driver_options(smmu);
|
||||
|
||||
/* Probe the h/w */
|
||||
ret = arm_smmu_device_probe(smmu);
|
||||
if (ret)
|
||||
|
|
|
@ -1830,8 +1830,9 @@ static int domain_init(struct dmar_domain *domain, int guest_width)
|
|||
|
||||
static void domain_exit(struct dmar_domain *domain)
|
||||
{
|
||||
struct dmar_drhd_unit *drhd;
|
||||
struct intel_iommu *iommu;
|
||||
struct page *freelist = NULL;
|
||||
int i;
|
||||
|
||||
/* Domain 0 is reserved, so dont process it */
|
||||
if (!domain)
|
||||
|
@ -1851,8 +1852,10 @@ static void domain_exit(struct dmar_domain *domain)
|
|||
|
||||
/* clear attached or cached domains */
|
||||
rcu_read_lock();
|
||||
for_each_set_bit(i, domain->iommu_bmp, g_num_of_iommus)
|
||||
iommu_detach_domain(domain, g_iommus[i]);
|
||||
for_each_active_iommu(iommu, drhd)
|
||||
if (domain_type_is_vm(domain) ||
|
||||
test_bit(iommu->seq_id, domain->iommu_bmp))
|
||||
iommu_detach_domain(domain, iommu);
|
||||
rcu_read_unlock();
|
||||
|
||||
dma_free_pagelist(freelist);
|
||||
|
|
|
@ -524,9 +524,18 @@ gigaset_tty_open(struct tty_struct *tty)
|
|||
cs->hw.ser->tty = tty;
|
||||
atomic_set(&cs->hw.ser->refcnt, 1);
|
||||
init_completion(&cs->hw.ser->dead_cmp);
|
||||
|
||||
tty->disc_data = cs;
|
||||
|
||||
/* Set the amount of data we're willing to receive per call
|
||||
* from the hardware driver to half of the input buffer size
|
||||
* to leave some reserve.
|
||||
* Note: We don't do flow control towards the hardware driver.
|
||||
* If more data is received than will fit into the input buffer,
|
||||
* it will be dropped and an error will be logged. This should
|
||||
* never happen as the device is slow and the buffer size ample.
|
||||
*/
|
||||
tty->receive_room = RBUFSIZE/2;
|
||||
|
||||
/* OK.. Initialization of the datastructures and the HW is done.. Now
|
||||
* startup system and notify the LL that we are ready to run
|
||||
*/
|
||||
|
@ -597,28 +606,6 @@ static int gigaset_tty_hangup(struct tty_struct *tty)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Read on the tty.
|
||||
* Unused, received data goes only to the Gigaset driver.
|
||||
*/
|
||||
static ssize_t
|
||||
gigaset_tty_read(struct tty_struct *tty, struct file *file,
|
||||
unsigned char __user *buf, size_t count)
|
||||
{
|
||||
return -EAGAIN;
|
||||
}
|
||||
|
||||
/*
|
||||
* Write on the tty.
|
||||
* Unused, transmit data comes only from the Gigaset driver.
|
||||
*/
|
||||
static ssize_t
|
||||
gigaset_tty_write(struct tty_struct *tty, struct file *file,
|
||||
const unsigned char *buf, size_t count)
|
||||
{
|
||||
return -EAGAIN;
|
||||
}
|
||||
|
||||
/*
|
||||
* Ioctl on the tty.
|
||||
* Called in process context only.
|
||||
|
@ -752,8 +739,6 @@ static struct tty_ldisc_ops gigaset_ldisc = {
|
|||
.open = gigaset_tty_open,
|
||||
.close = gigaset_tty_close,
|
||||
.hangup = gigaset_tty_hangup,
|
||||
.read = gigaset_tty_read,
|
||||
.write = gigaset_tty_write,
|
||||
.ioctl = gigaset_tty_ioctl,
|
||||
.receive_buf = gigaset_tty_receive,
|
||||
.write_wakeup = gigaset_tty_wakeup,
|
||||
|
|
|
@ -494,7 +494,7 @@ static int bitmap_new_disk_sb(struct bitmap *bitmap)
|
|||
bitmap_super_t *sb;
|
||||
unsigned long chunksize, daemon_sleep, write_behind;
|
||||
|
||||
bitmap->storage.sb_page = alloc_page(GFP_KERNEL);
|
||||
bitmap->storage.sb_page = alloc_page(GFP_KERNEL | __GFP_ZERO);
|
||||
if (bitmap->storage.sb_page == NULL)
|
||||
return -ENOMEM;
|
||||
bitmap->storage.sb_page->index = 0;
|
||||
|
@ -541,6 +541,7 @@ static int bitmap_new_disk_sb(struct bitmap *bitmap)
|
|||
sb->state = cpu_to_le32(bitmap->flags);
|
||||
bitmap->events_cleared = bitmap->mddev->events;
|
||||
sb->events_cleared = cpu_to_le64(bitmap->mddev->events);
|
||||
bitmap->mddev->bitmap_info.nodes = 0;
|
||||
|
||||
kunmap_atomic(sb);
|
||||
|
||||
|
@ -558,6 +559,7 @@ static int bitmap_read_sb(struct bitmap *bitmap)
|
|||
unsigned long sectors_reserved = 0;
|
||||
int err = -EINVAL;
|
||||
struct page *sb_page;
|
||||
loff_t offset = bitmap->mddev->bitmap_info.offset;
|
||||
|
||||
if (!bitmap->storage.file && !bitmap->mddev->bitmap_info.offset) {
|
||||
chunksize = 128 * 1024 * 1024;
|
||||
|
@ -584,9 +586,9 @@ static int bitmap_read_sb(struct bitmap *bitmap)
|
|||
bm_blocks = ((bm_blocks+7) >> 3) + sizeof(bitmap_super_t);
|
||||
/* to 4k blocks */
|
||||
bm_blocks = DIV_ROUND_UP_SECTOR_T(bm_blocks, 4096);
|
||||
bitmap->mddev->bitmap_info.offset += bitmap->cluster_slot * (bm_blocks << 3);
|
||||
offset = bitmap->mddev->bitmap_info.offset + (bitmap->cluster_slot * (bm_blocks << 3));
|
||||
pr_info("%s:%d bm slot: %d offset: %llu\n", __func__, __LINE__,
|
||||
bitmap->cluster_slot, (unsigned long long)bitmap->mddev->bitmap_info.offset);
|
||||
bitmap->cluster_slot, offset);
|
||||
}
|
||||
|
||||
if (bitmap->storage.file) {
|
||||
|
@ -597,7 +599,7 @@ static int bitmap_read_sb(struct bitmap *bitmap)
|
|||
bitmap, bytes, sb_page);
|
||||
} else {
|
||||
err = read_sb_page(bitmap->mddev,
|
||||
bitmap->mddev->bitmap_info.offset,
|
||||
offset,
|
||||
sb_page,
|
||||
0, sizeof(bitmap_super_t));
|
||||
}
|
||||
|
@ -611,8 +613,16 @@ static int bitmap_read_sb(struct bitmap *bitmap)
|
|||
daemon_sleep = le32_to_cpu(sb->daemon_sleep) * HZ;
|
||||
write_behind = le32_to_cpu(sb->write_behind);
|
||||
sectors_reserved = le32_to_cpu(sb->sectors_reserved);
|
||||
nodes = le32_to_cpu(sb->nodes);
|
||||
strlcpy(bitmap->mddev->bitmap_info.cluster_name, sb->cluster_name, 64);
|
||||
/* XXX: This is a hack to ensure that we don't use clustering
|
||||
* in case:
|
||||
* - dm-raid is in use and
|
||||
* - the nodes written in bitmap_sb is erroneous.
|
||||
*/
|
||||
if (!bitmap->mddev->sync_super) {
|
||||
nodes = le32_to_cpu(sb->nodes);
|
||||
strlcpy(bitmap->mddev->bitmap_info.cluster_name,
|
||||
sb->cluster_name, 64);
|
||||
}
|
||||
|
||||
/* verify that the bitmap-specific fields are valid */
|
||||
if (sb->magic != cpu_to_le32(BITMAP_MAGIC))
|
||||
|
@ -671,7 +681,7 @@ static int bitmap_read_sb(struct bitmap *bitmap)
|
|||
kunmap_atomic(sb);
|
||||
/* Assiging chunksize is required for "re_read" */
|
||||
bitmap->mddev->bitmap_info.chunksize = chunksize;
|
||||
if (nodes && (bitmap->cluster_slot < 0)) {
|
||||
if (err == 0 && nodes && (bitmap->cluster_slot < 0)) {
|
||||
err = md_setup_cluster(bitmap->mddev, nodes);
|
||||
if (err) {
|
||||
pr_err("%s: Could not setup cluster service (%d)\n",
|
||||
|
@ -1866,10 +1876,6 @@ int bitmap_copy_from_slot(struct mddev *mddev, int slot,
|
|||
if (IS_ERR(bitmap))
|
||||
return PTR_ERR(bitmap);
|
||||
|
||||
rv = bitmap_read_sb(bitmap);
|
||||
if (rv)
|
||||
goto err;
|
||||
|
||||
rv = bitmap_init_from_disk(bitmap, 0);
|
||||
if (rv)
|
||||
goto err;
|
||||
|
|
|
@ -44,6 +44,7 @@ struct resync_info {
|
|||
|
||||
/* md_cluster_info flags */
|
||||
#define MD_CLUSTER_WAITING_FOR_NEWDISK 1
|
||||
#define MD_CLUSTER_SUSPEND_READ_BALANCING 2
|
||||
|
||||
|
||||
struct md_cluster_info {
|
||||
|
@ -275,6 +276,9 @@ static void recover_bitmaps(struct md_thread *thread)
|
|||
|
||||
static void recover_prep(void *arg)
|
||||
{
|
||||
struct mddev *mddev = arg;
|
||||
struct md_cluster_info *cinfo = mddev->cluster_info;
|
||||
set_bit(MD_CLUSTER_SUSPEND_READ_BALANCING, &cinfo->state);
|
||||
}
|
||||
|
||||
static void recover_slot(void *arg, struct dlm_slot *slot)
|
||||
|
@ -307,6 +311,7 @@ static void recover_done(void *arg, struct dlm_slot *slots,
|
|||
|
||||
cinfo->slot_number = our_slot;
|
||||
complete(&cinfo->completion);
|
||||
clear_bit(MD_CLUSTER_SUSPEND_READ_BALANCING, &cinfo->state);
|
||||
}
|
||||
|
||||
static const struct dlm_lockspace_ops md_ls_ops = {
|
||||
|
@ -816,12 +821,17 @@ static void resync_finish(struct mddev *mddev)
|
|||
resync_send(mddev, RESYNCING, 0, 0);
|
||||
}
|
||||
|
||||
static int area_resyncing(struct mddev *mddev, sector_t lo, sector_t hi)
|
||||
static int area_resyncing(struct mddev *mddev, int direction,
|
||||
sector_t lo, sector_t hi)
|
||||
{
|
||||
struct md_cluster_info *cinfo = mddev->cluster_info;
|
||||
int ret = 0;
|
||||
struct suspend_info *s;
|
||||
|
||||
if ((direction == READ) &&
|
||||
test_bit(MD_CLUSTER_SUSPEND_READ_BALANCING, &cinfo->state))
|
||||
return 1;
|
||||
|
||||
spin_lock_irq(&cinfo->suspend_lock);
|
||||
if (list_empty(&cinfo->suspend_list))
|
||||
goto out;
|
||||
|
|
|
@ -18,7 +18,7 @@ struct md_cluster_operations {
|
|||
int (*metadata_update_start)(struct mddev *mddev);
|
||||
int (*metadata_update_finish)(struct mddev *mddev);
|
||||
int (*metadata_update_cancel)(struct mddev *mddev);
|
||||
int (*area_resyncing)(struct mddev *mddev, sector_t lo, sector_t hi);
|
||||
int (*area_resyncing)(struct mddev *mddev, int direction, sector_t lo, sector_t hi);
|
||||
int (*add_new_disk_start)(struct mddev *mddev, struct md_rdev *rdev);
|
||||
int (*add_new_disk_finish)(struct mddev *mddev);
|
||||
int (*new_disk_ack)(struct mddev *mddev, bool ack);
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
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Reference in a new issue