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drm/radeon: track VM update fences separately
Note for each fence if it's a VM page table update or not. This allows us to determine the last VM update in a sync object and so to figure out if we need to flush the TLB or not. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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587cdda8f7
commit
ad1a58a45a
5 changed files with 33 additions and 21 deletions
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@ -360,14 +360,15 @@ struct radeon_fence_driver {
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};
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struct radeon_fence {
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struct fence base;
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struct fence base;
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struct radeon_device *rdev;
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uint64_t seq;
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struct radeon_device *rdev;
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uint64_t seq;
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/* RB, DMA, etc. */
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unsigned ring;
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unsigned ring;
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bool is_vm_update;
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wait_queue_t fence_wake;
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wait_queue_t fence_wake;
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};
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int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring);
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@ -594,6 +595,7 @@ void radeon_semaphore_free(struct radeon_device *rdev,
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struct radeon_sync {
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struct radeon_semaphore *semaphores[RADEON_NUM_SYNCS];
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struct radeon_fence *sync_to[RADEON_NUM_RINGS];
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struct radeon_fence *last_vm_update;
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};
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void radeon_sync_create(struct radeon_sync *sync);
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@ -926,8 +928,8 @@ struct radeon_vm {
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struct mutex mutex;
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/* last fence for cs using this vm */
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struct radeon_fence *fence;
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/* last flush or NULL if we still need to flush */
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struct radeon_fence *last_flush;
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/* last flushed PD/PT update */
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struct radeon_fence *flushed_updates;
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/* last use of vmid */
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struct radeon_fence *last_id_use;
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};
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@ -2975,7 +2977,7 @@ struct radeon_fence *radeon_vm_grab_id(struct radeon_device *rdev,
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struct radeon_vm *vm, int ring);
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void radeon_vm_flush(struct radeon_device *rdev,
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struct radeon_vm *vm,
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int ring);
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int ring, struct radeon_fence *fence);
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void radeon_vm_fence(struct radeon_device *rdev,
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struct radeon_vm *vm,
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struct radeon_fence *fence);
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@ -140,6 +140,7 @@ int radeon_fence_emit(struct radeon_device *rdev,
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(*fence)->rdev = rdev;
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(*fence)->seq = seq;
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(*fence)->ring = ring;
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(*fence)->is_vm_update = false;
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fence_init(&(*fence)->base, &radeon_fence_ops,
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&rdev->fence_queue.lock, rdev->fence_context + ring, seq);
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radeon_fence_ring_emit(rdev, ring, *fence);
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@ -154,7 +154,8 @@ int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib,
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}
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if (ib->vm)
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radeon_vm_flush(rdev, ib->vm, ib->ring);
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radeon_vm_flush(rdev, ib->vm, ib->ring,
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ib->sync.last_vm_update);
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if (const_ib) {
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radeon_ring_ib_execute(rdev, const_ib->ring, const_ib);
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@ -48,6 +48,8 @@ void radeon_sync_create(struct radeon_sync *sync)
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for (i = 0; i < RADEON_NUM_RINGS; ++i)
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sync->sync_to[i] = NULL;
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sync->last_vm_update = NULL;
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}
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/**
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@ -68,6 +70,11 @@ void radeon_sync_fence(struct radeon_sync *sync,
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other = sync->sync_to[fence->ring];
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sync->sync_to[fence->ring] = radeon_fence_later(fence, other);
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if (fence->is_vm_update) {
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other = sync->last_vm_update;
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sync->last_vm_update = radeon_fence_later(fence, other);
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}
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}
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/**
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@ -190,7 +190,7 @@ struct radeon_fence *radeon_vm_grab_id(struct radeon_device *rdev,
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return NULL;
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/* we definately need to flush */
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radeon_fence_unref(&vm->last_flush);
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vm->pd_gpu_addr = ~0ll;
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/* skip over VMID 0, since it is the system VM */
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for (i = 1; i < rdev->vm_manager.nvm; ++i) {
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@ -228,6 +228,7 @@ struct radeon_fence *radeon_vm_grab_id(struct radeon_device *rdev,
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* @rdev: radeon_device pointer
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* @vm: vm we want to flush
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* @ring: ring to use for flush
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* @updates: last vm update that is waited for
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*
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* Flush the vm (cayman+).
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*
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@ -235,13 +236,16 @@ struct radeon_fence *radeon_vm_grab_id(struct radeon_device *rdev,
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*/
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void radeon_vm_flush(struct radeon_device *rdev,
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struct radeon_vm *vm,
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int ring)
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int ring, struct radeon_fence *updates)
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{
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uint64_t pd_addr = radeon_bo_gpu_offset(vm->page_directory);
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/* if we can't remember our last VM flush then flush now! */
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if (!vm->last_flush || pd_addr != vm->pd_gpu_addr) {
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if (pd_addr != vm->pd_gpu_addr || !vm->flushed_updates ||
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radeon_fence_is_earlier(vm->flushed_updates, updates)) {
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trace_radeon_vm_flush(pd_addr, ring, vm->id);
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radeon_fence_unref(&vm->flushed_updates);
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vm->flushed_updates = radeon_fence_ref(updates);
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vm->pd_gpu_addr = pd_addr;
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radeon_ring_vm_flush(rdev, &rdev->ring[ring],
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vm->id, vm->pd_gpu_addr);
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@ -272,10 +276,6 @@ void radeon_vm_fence(struct radeon_device *rdev,
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radeon_fence_unref(&vm->last_id_use);
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vm->last_id_use = radeon_fence_ref(fence);
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/* we just flushed the VM, remember that */
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if (!vm->last_flush)
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vm->last_flush = radeon_fence_ref(fence);
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}
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/**
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@ -418,6 +418,7 @@ static int radeon_vm_clear_bo(struct radeon_device *rdev,
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if (r)
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goto error_free;
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ib.fence->is_vm_update = true;
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radeon_bo_fence(bo, ib.fence, false);
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error_free:
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@ -697,10 +698,10 @@ int radeon_vm_update_page_directory(struct radeon_device *rdev,
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radeon_ib_free(rdev, &ib);
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return r;
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}
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ib.fence->is_vm_update = true;
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radeon_bo_fence(pd, ib.fence, false);
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radeon_fence_unref(&vm->fence);
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vm->fence = radeon_fence_ref(ib.fence);
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radeon_fence_unref(&vm->last_flush);
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}
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radeon_ib_free(rdev, &ib);
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@ -989,11 +990,11 @@ int radeon_vm_bo_update(struct radeon_device *rdev,
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radeon_ib_free(rdev, &ib);
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return r;
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}
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ib.fence->is_vm_update = true;
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radeon_vm_fence_pts(vm, bo_va->it.start, bo_va->it.last + 1, ib.fence);
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radeon_fence_unref(&vm->fence);
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vm->fence = radeon_fence_ref(ib.fence);
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radeon_ib_free(rdev, &ib);
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radeon_fence_unref(&vm->last_flush);
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return 0;
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}
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@ -1124,7 +1125,7 @@ int radeon_vm_init(struct radeon_device *rdev, struct radeon_vm *vm)
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vm->id = 0;
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vm->ib_bo_va = NULL;
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vm->fence = NULL;
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vm->last_flush = NULL;
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vm->flushed_updates = NULL;
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vm->last_id_use = NULL;
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mutex_init(&vm->mutex);
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vm->va = RB_ROOT;
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@ -1196,7 +1197,7 @@ void radeon_vm_fini(struct radeon_device *rdev, struct radeon_vm *vm)
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radeon_bo_unref(&vm->page_directory);
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radeon_fence_unref(&vm->fence);
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radeon_fence_unref(&vm->last_flush);
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radeon_fence_unref(&vm->flushed_updates);
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radeon_fence_unref(&vm->last_id_use);
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mutex_destroy(&vm->mutex);
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