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MIPS: Octeon: Update bootloader board type constants.
Many new types of boards exist, so lets recognize them. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Cc: devel@driverdev.osuosl.org Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Patchwork: https://patchwork.linux-mips.org/patch/2940/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
David Daney
Ralf Baechle
parent
af866496c7
commit
ada11a339d
3 changed files with 95 additions and 3 deletions
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@ -117,6 +117,10 @@ int cvmx_helper_board_get_mii_address(int ipd_port)
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case CVMX_BOARD_TYPE_EBH5200:
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case CVMX_BOARD_TYPE_EBH5201:
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case CVMX_BOARD_TYPE_EBT5200:
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/* Board has 2 management ports */
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if ((ipd_port >= CVMX_HELPER_BOARD_MGMT_IPD_PORT) &&
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(ipd_port < (CVMX_HELPER_BOARD_MGMT_IPD_PORT + 2)))
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return ipd_port - CVMX_HELPER_BOARD_MGMT_IPD_PORT;
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/*
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* Board has 4 SGMII ports. The PHYs start right after the MII
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* ports MII0 = 0, MII1 = 1, SGMII = 2-5.
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@ -128,6 +132,9 @@ int cvmx_helper_board_get_mii_address(int ipd_port)
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case CVMX_BOARD_TYPE_EBH5600:
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case CVMX_BOARD_TYPE_EBH5601:
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case CVMX_BOARD_TYPE_EBH5610:
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/* Board has 1 management port */
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if (ipd_port == CVMX_HELPER_BOARD_MGMT_IPD_PORT)
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return 0;
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/*
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* Board has 8 SGMII ports. 4 connect out, two connect
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* to a switch, and 2 loop to each other
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@ -147,6 +154,19 @@ int cvmx_helper_board_get_mii_address(int ipd_port)
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return ipd_port - 16 + 1;
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else
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return -1;
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case CVMX_BOARD_TYPE_NIC_XLE_10G:
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case CVMX_BOARD_TYPE_NIC10E:
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return -1;
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case CVMX_BOARD_TYPE_NIC4E:
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if (ipd_port >= 0 && ipd_port <= 3)
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return (ipd_port + 0x1f) & 0x1f;
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else
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return -1;
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case CVMX_BOARD_TYPE_NIC2E:
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if (ipd_port >= 0 && ipd_port <= 1)
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return ipd_port + 1;
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else
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return -1;
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case CVMX_BOARD_TYPE_BBGW_REF:
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/*
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* No PHYs are connected to Octeon, everything is
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@ -170,6 +170,22 @@ enum cvmx_board_types_enum {
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/* Special 'generic' board type, supports many boards */
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CVMX_BOARD_TYPE_GENERIC = 28,
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CVMX_BOARD_TYPE_EBH5610 = 29,
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CVMX_BOARD_TYPE_LANAI2_A = 30,
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CVMX_BOARD_TYPE_LANAI2_U = 31,
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CVMX_BOARD_TYPE_EBB5600 = 32,
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CVMX_BOARD_TYPE_EBB6300 = 33,
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CVMX_BOARD_TYPE_NIC_XLE_10G = 34,
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CVMX_BOARD_TYPE_LANAI2_G = 35,
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CVMX_BOARD_TYPE_EBT5810 = 36,
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CVMX_BOARD_TYPE_NIC10E = 37,
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CVMX_BOARD_TYPE_EP6300C = 38,
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CVMX_BOARD_TYPE_EBB6800 = 39,
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CVMX_BOARD_TYPE_NIC4E = 40,
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CVMX_BOARD_TYPE_NIC2E = 41,
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CVMX_BOARD_TYPE_EBB6600 = 42,
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CVMX_BOARD_TYPE_REDWING = 43,
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CVMX_BOARD_TYPE_NIC68_4 = 44,
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CVMX_BOARD_TYPE_NIC10E_66 = 45,
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CVMX_BOARD_TYPE_MAX,
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/*
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@ -187,6 +203,23 @@ enum cvmx_board_types_enum {
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CVMX_BOARD_TYPE_CUST_NS0216 = 10002,
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CVMX_BOARD_TYPE_CUST_NB5 = 10003,
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CVMX_BOARD_TYPE_CUST_WMR500 = 10004,
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CVMX_BOARD_TYPE_CUST_ITB101 = 10005,
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CVMX_BOARD_TYPE_CUST_NTE102 = 10006,
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CVMX_BOARD_TYPE_CUST_AGS103 = 10007,
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CVMX_BOARD_TYPE_CUST_GST104 = 10008,
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CVMX_BOARD_TYPE_CUST_GCT105 = 10009,
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CVMX_BOARD_TYPE_CUST_AGS106 = 10010,
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CVMX_BOARD_TYPE_CUST_SGM107 = 10011,
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CVMX_BOARD_TYPE_CUST_GCT108 = 10012,
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CVMX_BOARD_TYPE_CUST_AGS109 = 10013,
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CVMX_BOARD_TYPE_CUST_GCT110 = 10014,
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CVMX_BOARD_TYPE_CUST_L2_AIR_SENDER = 10015,
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CVMX_BOARD_TYPE_CUST_L2_AIR_RECEIVER = 10016,
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CVMX_BOARD_TYPE_CUST_L2_ACCTON2_TX = 10017,
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CVMX_BOARD_TYPE_CUST_L2_ACCTON2_RX = 10018,
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CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_TX = 10019,
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CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_RX = 10020,
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CVMX_BOARD_TYPE_CUST_L2_ZINWELL = 10021,
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CVMX_BOARD_TYPE_CUST_DEFINED_MAX = 20000,
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/*
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@ -247,6 +280,22 @@ static inline const char *cvmx_board_type_to_string(enum
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5200)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_GENERIC)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5610)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_LANAI2_A)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_LANAI2_U)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB5600)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6300)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC_XLE_10G)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_LANAI2_G)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5810)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC10E)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EP6300C)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6800)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC4E)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC2E)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6600)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_REDWING)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC68_4)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC10E_66)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MAX)
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/* Customer boards listed here */
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@ -255,6 +304,23 @@ static inline const char *cvmx_board_type_to_string(enum
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NS0216)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NB5)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_WMR500)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_ITB101)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NTE102)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_AGS103)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GST104)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GCT105)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_AGS106)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_SGM107)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GCT108)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_AGS109)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GCT110)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_AIR_SENDER)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_AIR_RECEIVER)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_ACCTON2_TX)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_ACCTON2_RX)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_TX)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_RX)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_ZINWELL)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_DEFINED_MAX)
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/* Customer private range */
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@ -271,9 +337,9 @@ static inline const char *cvmx_chip_type_to_string(enum
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{
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switch (type) {
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ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_NULL)
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ENUM_CHIP_TYPE_CASE(CVMX_CHIP_SIM_TYPE_DEPRECATED)
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ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_OCTEON_SAMPLE)
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ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_MAX)
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ENUM_CHIP_TYPE_CASE(CVMX_CHIP_SIM_TYPE_DEPRECATED)
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ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_OCTEON_SAMPLE)
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ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_MAX)
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}
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return "Unsupported Chip";
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}
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@ -44,6 +44,12 @@ typedef enum {
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set_phy_link_flags_flow_control_mask = 0x3 << 1, /* Mask for 2 bit wide flow control field */
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} cvmx_helper_board_set_phy_link_flags_types_t;
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/*
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* Fake IPD port, the RGMII/MII interface may use different PHY, use
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* this macro to return appropriate MIX address to read the PHY.
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*/
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#define CVMX_HELPER_BOARD_MGMT_IPD_PORT -10
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/**
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* cvmx_override_board_link_get(int ipd_port) is a function
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* pointer. It is meant to allow customization of the process of
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