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ARM: dts: mediatek: Update MT7629 PCIe node for new format

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To match the new dts binding. Remove "subsys",unused
interrupt and slot node.Add "interrupt-names",
"linux,pci-domain" and pciecfg node.

Signed-off-by: Chuanjia Liu <chuanjia.liu@mediatek.com>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
Link: https://lore.kernel.org/r/20210823032800.1660-7-chuanjia.liu@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Chuanjia Liu 2021-08-23 11:28:00 +08:00 committed by Matthias Brugger
parent 235e40fd00
commit adfaea2387
2 changed files with 23 additions and 25 deletions
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3
arch/arm/boot/dts/mt7629-rfb.dts
View file

@ -140,9 +140,10 @@ partition@b0000 {
};
};
&pcie {
&pcie1 {
pinctrl-names = "default";
pinctrl-0 = <&pcie_pins>;
status = "okay";
};
&pciephy1 {

45
arch/arm/boot/dts/mt7629.dtsi
View file

@ -361,16 +361,21 @@ pciesys: syscon@1a100800 {
#reset-cells = <1>;
};
pcie: pcie@1a140000 {
pciecfg: pciecfg@1a140000 {
compatible = "mediatek,generic-pciecfg", "syscon";
reg = <0x1a140000 0x1000>;
};
pcie1: pcie@1a145000 {
compatible = "mediatek,mt7629-pcie";
device_type = "pci";
reg = <0x1a140000 0x1000>,
<0x1a145000 0x1000>;
reg-names = "subsys","port1";
reg = <0x1a145000 0x1000>;
reg-names = "port1";
linux,pci-domain = <1>;
#address-cells = <3>;
#size-cells = <2>;
interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "pcie_irq";
clocks = <&pciesys CLK_PCIE_P1_MAC_EN>,
<&pciesys CLK_PCIE_P0_AHB_EN>,
<&pciesys CLK_PCIE_P1_AUX_EN>,
@ -391,26 +396,18 @@ pcie: pcie@1a140000 {
power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>;
bus-range = <0x00 0xff>;
ranges = <0x82000000 0 0x20000000 0x20000000 0 0x10000000>;
status = "disabled";
pcie1: pcie@1,0 {
device_type = "pci";
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc1 0>,
<0 0 0 2 &pcie_intc1 1>,
<0 0 0 3 &pcie_intc1 2>,
<0 0 0 4 &pcie_intc1 3>;
pcie_intc1: interrupt-controller {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
ranges;
num-lanes = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc1 0>,
<0 0 0 2 &pcie_intc1 1>,
<0 0 0 3 &pcie_intc1 2>,
<0 0 0 4 &pcie_intc1 3>;
pcie_intc1: interrupt-controller {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
};
};
};