net/mlx5: CT: Remove warning of ignore_flow_level support for VFs

ignore_flow_level isn't supported for VFs, and so it causes
post_act and ct to warn about it.

Instead of disabling CT for VFs, and a driver update will be need
to enable CT again once firmware support this, remove this warning
specifically for VFs. This way, it could be automatically enabled on
future firmwares where VFs support ignore_flow_level capability.

Signed-off-by: Paul Blakey <paulb@nvidia.com>
Reviewed-by: Maor Dickman <maord@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
This commit is contained in:
Paul Blakey 2021-08-31 11:57:52 +03:00 committed by Saeed Mahameed
parent 1aec85974a
commit ae2ee3be99
2 changed files with 27 additions and 20 deletions

View file

@ -4,6 +4,7 @@
#include "en_tc.h"
#include "post_act.h"
#include "mlx5_core.h"
#include "fs_core.h"
struct mlx5e_post_act {
enum mlx5_flow_namespace_type ns_type;
@ -28,16 +29,14 @@ struct mlx5e_post_act *
mlx5e_tc_post_act_init(struct mlx5e_priv *priv, struct mlx5_fs_chains *chains,
enum mlx5_flow_namespace_type ns_type)
{
enum fs_flow_table_type table_type = ns_type == MLX5_FLOW_NAMESPACE_FDB ?
FS_FT_FDB : FS_FT_NIC_RX;
struct mlx5e_post_act *post_act;
int err;
if (ns_type == MLX5_FLOW_NAMESPACE_FDB &&
!MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev, ignore_flow_level)) {
mlx5_core_warn(priv->mdev, "firmware level support is missing\n");
err = -EOPNOTSUPP;
goto err_check;
} else if (!MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, ignore_flow_level)) {
mlx5_core_warn(priv->mdev, "firmware level support is missing\n");
if (!MLX5_CAP_FLOWTABLE_TYPE(priv->mdev, ignore_flow_level, table_type)) {
if (priv->mdev->coredev_type != MLX5_COREDEV_VF)
mlx5_core_warn(priv->mdev, "firmware level support is missing\n");
err = -EOPNOTSUPP;
goto err_check;
}

View file

@ -2039,25 +2039,36 @@ mlx5_tc_ct_init_check_esw_support(struct mlx5_eswitch *esw,
static int
mlx5_tc_ct_init_check_support(struct mlx5e_priv *priv,
enum mlx5_flow_namespace_type ns_type,
struct mlx5e_post_act *post_act,
const char **err_msg)
struct mlx5e_post_act *post_act)
{
struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
const char *err_msg = NULL;
int err = 0;
#if !IS_ENABLED(CONFIG_NET_TC_SKB_EXT)
/* cannot restore chain ID on HW miss */
*err_msg = "tc skb extension missing";
return -EOPNOTSUPP;
err_msg = "tc skb extension missing";
err = -EOPNOTSUPP;
goto out_err;
#endif
if (IS_ERR_OR_NULL(post_act)) {
*err_msg = "tc ct offload not supported, post action is missing";
return -EOPNOTSUPP;
/* Ignore_flow_level support isn't supported by default for VFs and so post_act
* won't be supported. Skip showing error msg.
*/
if (priv->mdev->coredev_type != MLX5_COREDEV_VF)
err_msg = "post action is missing";
err = -EOPNOTSUPP;
goto out_err;
}
if (ns_type == MLX5_FLOW_NAMESPACE_FDB)
return mlx5_tc_ct_init_check_esw_support(esw, err_msg);
return 0;
err = mlx5_tc_ct_init_check_esw_support(esw, &err_msg);
out_err:
if (err && err_msg)
netdev_dbg(priv->netdev, "tc ct offload not supported, %s\n", err_msg);
return err;
}
#define INIT_ERR_PREFIX "tc ct offload init failed"
@ -2070,16 +2081,13 @@ mlx5_tc_ct_init(struct mlx5e_priv *priv, struct mlx5_fs_chains *chains,
{
struct mlx5_tc_ct_priv *ct_priv;
struct mlx5_core_dev *dev;
const char *msg;
u64 mapping_id;
int err;
dev = priv->mdev;
err = mlx5_tc_ct_init_check_support(priv, ns_type, post_act, &msg);
if (err) {
mlx5_core_warn(dev, "tc ct offload not supported, %s\n", msg);
err = mlx5_tc_ct_init_check_support(priv, ns_type, post_act);
if (err)
goto err_support;
}
ct_priv = kzalloc(sizeof(*ct_priv), GFP_KERNEL);
if (!ct_priv)