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Code Issues Releases Wiki Activity

pmdomain: mediatek: Split bus_prot_mask

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bus_prot_mask is used for all operations, set clear and acknowledge. In
preparation of m8365 power domain support split this one mask into two,
one mask for set and clear, another one for acknowledge.

Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
Tested-by: Alexandre Mergnat <amergnat@baylibre.com>
Link: https://lore.kernel.org/r/20230918093751.1188668-4-msp@baylibre.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Markus Schneider-Pargmann 2023-09-18 11:37:47 +02:00 committed by Ulf Hansson
parent c6bee73207
commit ae442ba85a
2 changed files with 22 additions and 16 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

24
drivers/pmdomain/mediatek/mtk-pm-domains.c
View file

@ -123,18 +123,20 @@ static int _scpsys_bus_protect_enable(const struct scpsys_bus_prot_data *bpd, st
int i, ret;
for (i = 0; i < SPM_MAX_BUS_PROT_DATA; i++) {
u32 val, mask = bpd[i].bus_prot_mask;
u32 set_clr_mask = bpd[i].bus_prot_set_clr_mask;
u32 sta_mask = bpd[i].bus_prot_sta_mask;
u32 val;
if (!mask)
if (!set_clr_mask)
break;
if (bpd[i].flags & BUS_PROT_REG_UPDATE)
regmap_set_bits(regmap, bpd[i].bus_prot_set, mask);
regmap_set_bits(regmap, bpd[i].bus_prot_set, set_clr_mask);
else
regmap_write(regmap, bpd[i].bus_prot_set, mask);
regmap_write(regmap, bpd[i].bus_prot_set, set_clr_mask);
ret = regmap_read_poll_timeout(regmap, bpd[i].bus_prot_sta,
val, (val & mask) == mask,
val, (val & sta_mask) == sta_mask,
MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
if (ret)
return ret;
@ -160,21 +162,23 @@ static int _scpsys_bus_protect_disable(const struct scpsys_bus_prot_data *bpd,
int i, ret;
for (i = SPM_MAX_BUS_PROT_DATA - 1; i >= 0; i--) {
u32 val, mask = bpd[i].bus_prot_mask;
u32 set_clr_mask = bpd[i].bus_prot_set_clr_mask;
u32 sta_mask = bpd[i].bus_prot_sta_mask;
u32 val;
if (!mask)
if (!set_clr_mask)
continue;
if (bpd[i].flags & BUS_PROT_REG_UPDATE)
regmap_clear_bits(regmap, bpd[i].bus_prot_clr, mask);
regmap_clear_bits(regmap, bpd[i].bus_prot_clr, set_clr_mask);
else
regmap_write(regmap, bpd[i].bus_prot_clr, mask);
regmap_write(regmap, bpd[i].bus_prot_clr, set_clr_mask);
if (bpd[i].flags & BUS_PROT_IGNORE_CLR_ACK)
continue;
ret = regmap_read_poll_timeout(regmap, bpd[i].bus_prot_sta,
val, !(val & mask),
val, !(val & sta_mask),
MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
if (ret)
return ret;

14
drivers/pmdomain/mediatek/mtk-pm-domains.h
View file

@ -47,22 +47,23 @@ enum scpsys_bus_prot_flags {
BUS_PROT_IGNORE_CLR_ACK = BIT(2),
};
#define _BUS_PROT(_mask, _set, _clr, _sta, _flags) { \
.bus_prot_mask = (_mask), \
#define _BUS_PROT(_set_clr_mask, _set, _clr, _sta_mask, _sta, _flags) { \
.bus_prot_set_clr_mask = (_set_clr_mask), \
.bus_prot_set = _set, \
.bus_prot_clr = _clr, \
.bus_prot_sta_mask = (_sta_mask), \
.bus_prot_sta = _sta, \
.flags = _flags \
}
#define BUS_PROT_WR(_mask, _set, _clr, _sta) \
_BUS_PROT(_mask, _set, _clr, _sta, 0)
_BUS_PROT(_mask, _set, _clr, _mask, _sta, 0)
#define BUS_PROT_WR_IGN(_mask, _set, _clr, _sta) \
_BUS_PROT(_mask, _set, _clr, _sta, BUS_PROT_IGNORE_CLR_ACK)
_BUS_PROT(_mask, _set, _clr, _mask, _sta, BUS_PROT_IGNORE_CLR_ACK)
#define BUS_PROT_UPDATE(_mask, _set, _clr, _sta) \
_BUS_PROT(_mask, _set, _clr, _sta, BUS_PROT_REG_UPDATE)
_BUS_PROT(_mask, _set, _clr, _mask, _sta, BUS_PROT_REG_UPDATE)
#define BUS_PROT_UPDATE_TOPAXI(_mask) \
BUS_PROT_UPDATE(_mask, \
@ -71,9 +72,10 @@ enum scpsys_bus_prot_flags {
INFRA_TOPAXI_PROTECTSTA1)
struct scpsys_bus_prot_data {
u32 bus_prot_mask;
u32 bus_prot_set_clr_mask;
u32 bus_prot_set;
u32 bus_prot_clr;
u32 bus_prot_sta_mask;
u32 bus_prot_sta;
u8 flags;
};