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drm/dp: Fix OOB read when handling Post Cursor2 register
[ Upstream commita2151490cc
] The link_status array was not large enough to read the Adjust Request Post Cursor2 register, so remove the common helper function to avoid an OOB read, found with a -Warray-bounds build: drivers/gpu/drm/drm_dp_helper.c: In function 'drm_dp_get_adjust_request_post_cursor': drivers/gpu/drm/drm_dp_helper.c:59:27: error: array subscript 10 is outside array bounds of 'const u8[6]' {aka 'const unsigned char[6]'} [-Werror=array-bounds] 59 | return link_status[r - DP_LANE0_1_STATUS]; | ~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/drm_dp_helper.c:147:51: note: while referencing 'link_status' 147 | u8 drm_dp_get_adjust_request_post_cursor(const u8 link_status[DP_LINK_STATUS_SIZE], | ~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Replace the only user of the helper with an open-coded fetch and decode, similar to drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c. Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <mripard@kernel.org> Cc: Thomas Zimmermann <tzimmermann@suse.de> Cc: David Airlie <airlied@linux.ie> Cc: dri-devel@lists.freedesktop.org Fixes:79465e0ffe
("drm/dp: Add helper to get post-cursor adjustments") Signed-off-by: Kees Cook <keescook@chromium.org> Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://lore.kernel.org/r/20220105173507.2420910-1-keescook@chromium.org Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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commit
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3 changed files with 10 additions and 13 deletions
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@ -144,16 +144,6 @@ u8 drm_dp_get_adjust_tx_ffe_preset(const u8 link_status[DP_LINK_STATUS_SIZE],
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}
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EXPORT_SYMBOL(drm_dp_get_adjust_tx_ffe_preset);
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u8 drm_dp_get_adjust_request_post_cursor(const u8 link_status[DP_LINK_STATUS_SIZE],
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unsigned int lane)
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{
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unsigned int offset = DP_ADJUST_REQUEST_POST_CURSOR2;
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u8 value = dp_link_status(link_status, offset);
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return (value >> (lane << 1)) & 0x3;
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}
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EXPORT_SYMBOL(drm_dp_get_adjust_request_post_cursor);
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static int __8b10b_clock_recovery_delay_us(const struct drm_dp_aux *aux, u8 rd_interval)
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{
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if (rd_interval > 4)
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@ -549,6 +549,15 @@ static void drm_dp_link_get_adjustments(struct drm_dp_link *link,
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{
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struct drm_dp_link_train_set *adjust = &link->train.adjust;
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unsigned int i;
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u8 post_cursor;
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int err;
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err = drm_dp_dpcd_read(link->aux, DP_ADJUST_REQUEST_POST_CURSOR2,
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&post_cursor, sizeof(post_cursor));
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if (err < 0) {
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DRM_ERROR("failed to read post_cursor2: %d\n", err);
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post_cursor = 0;
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}
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for (i = 0; i < link->lanes; i++) {
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adjust->voltage_swing[i] =
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@ -560,7 +569,7 @@ static void drm_dp_link_get_adjustments(struct drm_dp_link *link,
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DP_TRAIN_PRE_EMPHASIS_SHIFT;
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adjust->post_cursor[i] =
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drm_dp_get_adjust_request_post_cursor(status, i);
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(post_cursor >> (i << 1)) & 0x3;
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}
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}
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@ -1528,8 +1528,6 @@ u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SI
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int lane);
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u8 drm_dp_get_adjust_tx_ffe_preset(const u8 link_status[DP_LINK_STATUS_SIZE],
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int lane);
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u8 drm_dp_get_adjust_request_post_cursor(const u8 link_status[DP_LINK_STATUS_SIZE],
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unsigned int lane);
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#define DP_BRANCH_OUI_HEADER_SIZE 0xc
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#define DP_RECEIVER_CAP_SIZE 0xf
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