memory: tegra: Add memory clients for Tegra234

Add few isochronous (ISO) and non-ISO memory clients. ISO clients have
guaranteed bandwidth requirement. PCIe clients added to the memory
client table represent each controller in Tegra234.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Sumit Gupta 2023-05-11 23:02:05 +05:30 committed by Thierry Reding
parent 9a38cb2766
commit aecc83f11d

View file

@ -14,6 +14,30 @@
static const struct tegra_mc_client tegra234_mc_clients[] = {
{
.id = TEGRA234_MEMORY_CLIENT_HDAR,
.name = "hdar",
.bpmp_id = TEGRA_ICC_BPMP_HDA,
.type = TEGRA_ICC_ISO_AUDIO,
.sid = TEGRA234_SID_HDA,
.regs = {
.sid = {
.override = 0xa8,
.security = 0xac,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_HDAW,
.name = "hdaw",
.bpmp_id = TEGRA_ICC_BPMP_HDA,
.type = TEGRA_ICC_ISO_AUDIO,
.sid = TEGRA234_SID_HDA,
.regs = {
.sid = {
.override = 0x1a8,
.security = 0x1ac,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_MGBEARD,
.name = "mgbeard",
.bpmp_id = TEGRA_ICC_BPMP_EQOS,
@ -133,6 +157,90 @@ static const struct tegra_mc_client tegra234_mc_clients[] = {
.security = 0x33c,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_VI2W,
.name = "vi2w",
.bpmp_id = TEGRA_ICC_BPMP_VI2,
.type = TEGRA_ICC_ISO_VI,
.sid = TEGRA234_SID_ISO_VI2,
.regs = {
.sid = {
.override = 0x380,
.security = 0x384,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_VI2FALR,
.name = "vi2falr",
.bpmp_id = TEGRA_ICC_BPMP_VI2FAL,
.type = TEGRA_ICC_ISO_VIFAL,
.sid = TEGRA234_SID_ISO_VI2FALC,
.regs = {
.sid = {
.override = 0x388,
.security = 0x38c,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_VI2FALW,
.name = "vi2falw",
.bpmp_id = TEGRA_ICC_BPMP_VI2FAL,
.type = TEGRA_ICC_ISO_VIFAL,
.sid = TEGRA234_SID_ISO_VI2FALC,
.regs = {
.sid = {
.override = 0x3e0,
.security = 0x3e4,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_APER,
.name = "aper",
.bpmp_id = TEGRA_ICC_BPMP_APE,
.type = TEGRA_ICC_ISO_AUDIO,
.sid = TEGRA234_SID_APE,
.regs = {
.sid = {
.override = 0x3d0,
.security = 0x3d4,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_APEW,
.name = "apew",
.bpmp_id = TEGRA_ICC_BPMP_APE,
.type = TEGRA_ICC_ISO_AUDIO,
.sid = TEGRA234_SID_APE,
.regs = {
.sid = {
.override = 0x3d8,
.security = 0x3dc,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_NVDISPLAYR,
.name = "nvdisplayr",
.bpmp_id = TEGRA_ICC_BPMP_DISPLAY,
.type = TEGRA_ICC_ISO_DISPLAY,
.sid = TEGRA234_SID_ISO_NVDISPLAY,
.regs = {
.sid = {
.override = 0x490,
.security = 0x494,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_NVDISPLAYR1,
.name = "nvdisplayr1",
.bpmp_id = TEGRA_ICC_BPMP_DISPLAY,
.type = TEGRA_ICC_ISO_DISPLAY,
.sid = TEGRA234_SID_ISO_NVDISPLAY,
.regs = {
.sid = {
.override = 0x508,
.security = 0x50c,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_BPMPR,
.name = "bpmpr",
@ -357,6 +465,318 @@ static const struct tegra_mc_client tegra234_mc_clients[] = {
.security = 0x37c,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE0R,
.name = "pcie0r",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_0,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE0,
.regs = {
.sid = {
.override = 0x6c0,
.security = 0x6c4,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE0W,
.name = "pcie0w",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_0,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE0,
.regs = {
.sid = {
.override = 0x6c8,
.security = 0x6cc,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE1R,
.name = "pcie1r",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_1,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE1,
.regs = {
.sid = {
.override = 0x6d0,
.security = 0x6d4,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE1W,
.name = "pcie1w",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_1,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE1,
.regs = {
.sid = {
.override = 0x6d8,
.security = 0x6dc,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE2AR,
.name = "pcie2ar",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_2,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE2,
.regs = {
.sid = {
.override = 0x6e0,
.security = 0x6e4,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE2AW,
.name = "pcie2aw",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_2,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE2,
.regs = {
.sid = {
.override = 0x6e8,
.security = 0x6ec,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE3R,
.name = "pcie3r",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_3,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE3,
.regs = {
.sid = {
.override = 0x6f0,
.security = 0x6f4,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE3W,
.name = "pcie3w",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_3,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE3,
.regs = {
.sid = {
.override = 0x6f8,
.security = 0x6fc,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE4R,
.name = "pcie4r",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_4,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE4,
.regs = {
.sid = {
.override = 0x700,
.security = 0x704,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE4W,
.name = "pcie4w",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_4,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE4,
.regs = {
.sid = {
.override = 0x708,
.security = 0x70c,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE5R,
.name = "pcie5r",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_5,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE5,
.regs = {
.sid = {
.override = 0x710,
.security = 0x714,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE5W,
.name = "pcie5w",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_5,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE5,
.regs = {
.sid = {
.override = 0x718,
.security = 0x71c,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE5R1,
.name = "pcie5r1",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_5,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE5,
.regs = {
.sid = {
.override = 0x778,
.security = 0x77c,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE6AR,
.name = "pcie6ar",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_6,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE6,
.regs = {
.sid = {
.override = 0x140,
.security = 0x144,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE6AW,
.name = "pcie6aw",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_6,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE6,
.regs = {
.sid = {
.override = 0x148,
.security = 0x14c,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE6AR1,
.name = "pcie6ar1",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_6,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE6,
.regs = {
.sid = {
.override = 0x1e8,
.security = 0x1ec,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE7AR,
.name = "pcie7ar",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_7,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE7,
.regs = {
.sid = {
.override = 0x150,
.security = 0x154,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE7AW,
.name = "pcie7aw",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_7,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE7,
.regs = {
.sid = {
.override = 0x180,
.security = 0x184,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE7AR1,
.name = "pcie7ar1",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_7,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE7,
.regs = {
.sid = {
.override = 0x248,
.security = 0x24c,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE8AR,
.name = "pcie8ar",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_8,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE8,
.regs = {
.sid = {
.override = 0x190,
.security = 0x194,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE8AW,
.name = "pcie8aw",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_8,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE8,
.regs = {
.sid = {
.override = 0x1d8,
.security = 0x1dc,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE9AR,
.name = "pcie9ar",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_9,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE9,
.regs = {
.sid = {
.override = 0x1e0,
.security = 0x1e4,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE9AW,
.name = "pcie9aw",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_9,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE9,
.regs = {
.sid = {
.override = 0x1f0,
.security = 0x1f4,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE10AR,
.name = "pcie10ar",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_10,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE10,
.regs = {
.sid = {
.override = 0x1f8,
.security = 0x1fc,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE10AW,
.name = "pcie10aw",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_10,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE10,
.regs = {
.sid = {
.override = 0x200,
.security = 0x204,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE10AR1,
.name = "pcie10ar1",
.bpmp_id = TEGRA_ICC_BPMP_PCIE_10,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_PCIE10,
.regs = {
.sid = {
.override = 0x240,
.security = 0x244,
},
},
},
};