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dmaengine: ioatdma: add error strings to chanerr output
Provide a mechanism to translate CHANERR bits to English strings in order to allow user to report more concise errors. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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1 changed files with 61 additions and 4 deletions
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@ -38,8 +38,54 @@
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#include "../dmaengine.h"
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#include "../dmaengine.h"
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static char *chanerr_str[] = {
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"DMA Transfer Destination Address Error",
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"Next Descriptor Address Error",
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"Descriptor Error",
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"Chan Address Value Error",
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"CHANCMD Error",
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"Chipset Uncorrectable Data Integrity Error",
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"DMA Uncorrectable Data Integrity Error",
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"Read Data Error",
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"Write Data Error",
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"Descriptor Control Error",
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"Descriptor Transfer Size Error",
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"Completion Address Error",
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"Interrupt Configuration Error",
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"Super extended descriptor Address Error",
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"Unaffiliated Error",
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"CRC or XOR P Error",
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"XOR Q Error",
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"Descriptor Count Error",
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"DIF All F detect Error",
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"Guard Tag verification Error",
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"Application Tag verification Error",
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"Reference Tag verification Error",
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"Bundle Bit Error",
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"Result DIF All F detect Error",
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"Result Guard Tag verification Error",
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"Result Application Tag verification Error",
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"Result Reference Tag verification Error",
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NULL
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};
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static void ioat_eh(struct ioatdma_chan *ioat_chan);
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static void ioat_eh(struct ioatdma_chan *ioat_chan);
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static void ioat_print_chanerrs(struct ioatdma_chan *ioat_chan, u32 chanerr)
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{
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int i;
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for (i = 0; i < 32; i++) {
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if ((chanerr >> i) & 1) {
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if (chanerr_str[i]) {
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dev_err(to_dev(ioat_chan), "Err(%d): %s\n",
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i, chanerr_str[i]);
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} else
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break;
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}
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}
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}
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/**
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/**
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* ioat_dma_do_interrupt - handler used for single vector interrupt mode
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* ioat_dma_do_interrupt - handler used for single vector interrupt mode
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* @irq: interrupt id
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* @irq: interrupt id
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@ -774,6 +820,11 @@ static void ioat_eh(struct ioatdma_chan *ioat_chan)
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if (chanerr ^ err_handled || chanerr == 0) {
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if (chanerr ^ err_handled || chanerr == 0) {
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dev_err(to_dev(ioat_chan), "%s: fatal error (%x:%x)\n",
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dev_err(to_dev(ioat_chan), "%s: fatal error (%x:%x)\n",
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__func__, chanerr, err_handled);
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__func__, chanerr, err_handled);
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dev_err(to_dev(ioat_chan), "Errors handled:\n");
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ioat_print_chanerrs(ioat_chan, err_handled);
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dev_err(to_dev(ioat_chan), "Errors not handled:\n");
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ioat_print_chanerrs(ioat_chan, (chanerr & ~err_handled));
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BUG();
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BUG();
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}
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}
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@ -833,6 +884,9 @@ void ioat_timer_event(unsigned long data)
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chanerr = readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET);
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chanerr = readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET);
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dev_err(to_dev(ioat_chan), "%s: Channel halted (%x)\n",
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dev_err(to_dev(ioat_chan), "%s: Channel halted (%x)\n",
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__func__, chanerr);
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__func__, chanerr);
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dev_err(to_dev(ioat_chan), "Errors:\n");
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ioat_print_chanerrs(ioat_chan, chanerr);
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if (test_bit(IOAT_RUN, &ioat_chan->state)) {
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if (test_bit(IOAT_RUN, &ioat_chan->state)) {
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spin_lock_bh(&ioat_chan->cleanup_lock);
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spin_lock_bh(&ioat_chan->cleanup_lock);
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spin_lock_bh(&ioat_chan->prep_lock);
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spin_lock_bh(&ioat_chan->prep_lock);
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@ -875,10 +929,13 @@ void ioat_timer_event(unsigned long data)
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u32 chanerr;
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u32 chanerr;
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chanerr = readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET);
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chanerr = readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET);
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dev_warn(to_dev(ioat_chan), "CHANSTS: %#Lx CHANERR: %#x\n",
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dev_err(to_dev(ioat_chan), "CHANSTS: %#Lx CHANERR: %#x\n",
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status, chanerr);
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status, chanerr);
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dev_warn(to_dev(ioat_chan), "Active descriptors: %d\n",
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dev_err(to_dev(ioat_chan), "Errors:\n");
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ioat_ring_active(ioat_chan));
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ioat_print_chanerrs(ioat_chan, chanerr);
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dev_dbg(to_dev(ioat_chan), "Active descriptors: %d\n",
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ioat_ring_active(ioat_chan));
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spin_lock_bh(&ioat_chan->prep_lock);
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spin_lock_bh(&ioat_chan->prep_lock);
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set_bit(IOAT_CHAN_DOWN, &ioat_chan->state);
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set_bit(IOAT_CHAN_DOWN, &ioat_chan->state);
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