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PCI: altera: Add Altera PCIe MSI driver
Add Altera PCIe MSI driver. This soft IP supports a configurable number of vectors, which is a DTS parameter. [bhelgaas: Kconfig depend on PCIE_ALTERA, typos, whitespace] Signed-off-by: Ley Foon Tan <lftan@altera.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Rob Herring <robh@kernel.org>
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5 changed files with 357 additions and 0 deletions
28
Documentation/devicetree/bindings/pci/altera-pcie-msi.txt
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28
Documentation/devicetree/bindings/pci/altera-pcie-msi.txt
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@ -0,0 +1,28 @@
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* Altera PCIe MSI controller
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Required properties:
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- compatible: should contain "altr,msi-1.0"
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- reg: specifies the physical base address of the controller and
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the length of the memory mapped region.
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- reg-names: must include the following entries:
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"csr": CSR registers
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"vector_slave": vectors slave port region
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- interrupt-parent: interrupt source phandle.
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- interrupts: specifies the interrupt source of the parent interrupt
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controller. The format of the interrupt specifier depends on the
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parent interrupt controller.
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- num-vectors: number of vectors, range 1 to 32.
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- msi-controller: indicates that this is MSI controller node
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Example
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msi0: msi@0xFF200000 {
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compatible = "altr,msi-1.0";
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reg = <0xFF200000 0x00000010
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0xFF200010 0x00000080>;
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reg-names = "csr", "vector_slave";
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interrupt-parent = <&hps_0_arm_gic_0>;
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interrupts = <0 42 4>;
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msi-controller;
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num-vectors = <32>;
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};
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@ -8047,6 +8047,14 @@ L: linux-pci@vger.kernel.org
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S: Maintained
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F: drivers/pci/host/*spear*
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PCI MSI DRIVER FOR ALTERA MSI IP
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M: Ley Foon Tan <lftan@altera.com>
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L: rfi@lists.rocketboards.org (moderated for non-subscribers)
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L: linux-pci@vger.kernel.org
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S: Supported
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F: Documentation/devicetree/bindings/pci/altera-pcie-msi.txt
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F: drivers/pci/host/pcie-altera-msi.c
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PCI MSI DRIVER FOR APPLIEDMICRO XGENE
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M: Duc Dang <dhdang@apm.com>
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L: linux-pci@vger.kernel.org
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@ -154,4 +154,12 @@ config PCIE_ALTERA
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Say Y here if you want to enable PCIe controller support on Altera
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FPGA.
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config PCIE_ALTERA_MSI
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bool "Altera PCIe MSI feature"
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depends on PCIE_ALTERA && PCI_MSI
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select PCI_MSI_IRQ_DOMAIN
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help
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Say Y here if you want PCIe MSI support for the Altera FPGA.
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This MSI driver supports Altera MSI to GIC controller IP.
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endmenu
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@ -18,3 +18,4 @@ obj-$(CONFIG_PCIE_IPROC) += pcie-iproc.o
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obj-$(CONFIG_PCIE_IPROC_PLATFORM) += pcie-iproc-platform.o
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obj-$(CONFIG_PCIE_IPROC_BCMA) += pcie-iproc-bcma.o
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obj-$(CONFIG_PCIE_ALTERA) += pcie-altera.o
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obj-$(CONFIG_PCIE_ALTERA_MSI) += pcie-altera-msi.o
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312
drivers/pci/host/pcie-altera-msi.c
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drivers/pci/host/pcie-altera-msi.c
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@ -0,0 +1,312 @@
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/*
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* Copyright Altera Corporation (C) 2013-2015. All rights reserved
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/interrupt.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/module.h>
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#include <linux/msi.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_pci.h>
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#include <linux/pci.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#define MSI_STATUS 0x0
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#define MSI_ERROR 0x4
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#define MSI_INTMASK 0x8
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#define MAX_MSI_VECTORS 32
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struct altera_msi {
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DECLARE_BITMAP(used, MAX_MSI_VECTORS);
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struct mutex lock; /* protect "used" bitmap */
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struct platform_device *pdev;
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struct irq_domain *msi_domain;
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struct irq_domain *inner_domain;
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void __iomem *csr_base;
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void __iomem *vector_base;
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phys_addr_t vector_phy;
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u32 num_of_vectors;
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int irq;
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};
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static inline void msi_writel(struct altera_msi *msi, const u32 value,
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const u32 reg)
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{
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writel_relaxed(value, msi->csr_base + reg);
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}
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static inline u32 msi_readl(struct altera_msi *msi, const u32 reg)
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{
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return readl_relaxed(msi->csr_base + reg);
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}
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static void altera_msi_isr(struct irq_desc *desc)
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{
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struct irq_chip *chip = irq_desc_get_chip(desc);
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struct altera_msi *msi;
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unsigned long status;
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u32 num_of_vectors;
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u32 bit;
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u32 virq;
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chained_irq_enter(chip, desc);
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msi = irq_desc_get_handler_data(desc);
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num_of_vectors = msi->num_of_vectors;
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while ((status = msi_readl(msi, MSI_STATUS)) != 0) {
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for_each_set_bit(bit, &status, msi->num_of_vectors) {
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/* Dummy read from vector to clear the interrupt */
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readl_relaxed(msi->vector_base + (bit * sizeof(u32)));
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virq = irq_find_mapping(msi->inner_domain, bit);
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if (virq)
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generic_handle_irq(virq);
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else
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dev_err(&msi->pdev->dev, "unexpected MSI\n");
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}
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}
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chained_irq_exit(chip, desc);
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}
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static struct irq_chip altera_msi_irq_chip = {
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.name = "Altera PCIe MSI",
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.irq_mask = pci_msi_mask_irq,
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.irq_unmask = pci_msi_unmask_irq,
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};
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static struct msi_domain_info altera_msi_domain_info = {
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.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_PCI_MSIX),
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.chip = &altera_msi_irq_chip,
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};
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static void altera_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
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{
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struct altera_msi *msi = irq_data_get_irq_chip_data(data);
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phys_addr_t addr = msi->vector_phy + (data->hwirq * sizeof(u32));
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msg->address_lo = lower_32_bits(addr);
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msg->address_hi = upper_32_bits(addr);
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msg->data = data->hwirq;
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dev_dbg(&msi->pdev->dev, "msi#%d address_hi %#x address_lo %#x\n",
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(int)data->hwirq, msg->address_hi, msg->address_lo);
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}
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static int altera_msi_set_affinity(struct irq_data *irq_data,
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const struct cpumask *mask, bool force)
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{
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return -EINVAL;
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}
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static struct irq_chip altera_msi_bottom_irq_chip = {
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.name = "Altera MSI",
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.irq_compose_msi_msg = altera_compose_msi_msg,
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.irq_set_affinity = altera_msi_set_affinity,
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};
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static int altera_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
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unsigned int nr_irqs, void *args)
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{
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struct altera_msi *msi = domain->host_data;
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unsigned long bit;
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u32 mask;
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WARN_ON(nr_irqs != 1);
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mutex_lock(&msi->lock);
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bit = find_first_zero_bit(msi->used, msi->num_of_vectors);
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if (bit >= msi->num_of_vectors) {
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mutex_unlock(&msi->lock);
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return -ENOSPC;
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}
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set_bit(bit, msi->used);
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mutex_unlock(&msi->lock);
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irq_domain_set_info(domain, virq, bit, &altera_msi_bottom_irq_chip,
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domain->host_data, handle_simple_irq,
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NULL, NULL);
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mask = msi_readl(msi, MSI_INTMASK);
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mask |= 1 << bit;
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msi_writel(msi, mask, MSI_INTMASK);
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return 0;
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}
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static void altera_irq_domain_free(struct irq_domain *domain,
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unsigned int virq, unsigned int nr_irqs)
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{
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struct irq_data *d = irq_domain_get_irq_data(domain, virq);
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struct altera_msi *msi = irq_data_get_irq_chip_data(d);
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u32 mask;
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mutex_lock(&msi->lock);
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if (!test_bit(d->hwirq, msi->used)) {
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dev_err(&msi->pdev->dev, "trying to free unused MSI#%lu\n",
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d->hwirq);
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} else {
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__clear_bit(d->hwirq, msi->used);
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mask = msi_readl(msi, MSI_INTMASK);
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mask &= ~(1 << d->hwirq);
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msi_writel(msi, mask, MSI_INTMASK);
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}
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mutex_unlock(&msi->lock);
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}
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static const struct irq_domain_ops msi_domain_ops = {
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.alloc = altera_irq_domain_alloc,
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.free = altera_irq_domain_free,
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};
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static int altera_allocate_domains(struct altera_msi *msi)
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{
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msi->inner_domain = irq_domain_add_linear(NULL, msi->num_of_vectors,
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&msi_domain_ops, msi);
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if (!msi->inner_domain) {
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dev_err(&msi->pdev->dev, "failed to create IRQ domain\n");
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return -ENOMEM;
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}
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msi->msi_domain = pci_msi_create_irq_domain(msi->pdev->dev.of_node,
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&altera_msi_domain_info, msi->inner_domain);
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if (!msi->msi_domain) {
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dev_err(&msi->pdev->dev, "failed to create MSI domain\n");
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irq_domain_remove(msi->inner_domain);
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return -ENOMEM;
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}
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return 0;
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}
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static void altera_free_domains(struct altera_msi *msi)
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{
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irq_domain_remove(msi->msi_domain);
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irq_domain_remove(msi->inner_domain);
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}
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static int altera_msi_remove(struct platform_device *pdev)
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{
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struct altera_msi *msi = platform_get_drvdata(pdev);
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msi_writel(msi, 0, MSI_INTMASK);
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irq_set_chained_handler(msi->irq, NULL);
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irq_set_handler_data(msi->irq, NULL);
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altera_free_domains(msi);
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platform_set_drvdata(pdev, NULL);
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return 0;
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}
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static int altera_msi_probe(struct platform_device *pdev)
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{
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struct altera_msi *msi;
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struct device_node *np = pdev->dev.of_node;
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struct resource *res;
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int ret;
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msi = devm_kzalloc(&pdev->dev, sizeof(struct altera_msi),
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GFP_KERNEL);
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if (!msi)
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return -ENOMEM;
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mutex_init(&msi->lock);
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msi->pdev = pdev;
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "csr");
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if (!res) {
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dev_err(&pdev->dev, "no csr memory resource defined\n");
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return -ENODEV;
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}
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msi->csr_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(msi->csr_base)) {
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dev_err(&pdev->dev, "failed to map csr memory\n");
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return PTR_ERR(msi->csr_base);
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}
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
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"vector_slave");
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if (!res) {
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dev_err(&pdev->dev, "no vector_slave memory resource defined\n");
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return -ENODEV;
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}
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msi->vector_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(msi->vector_base)) {
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dev_err(&pdev->dev, "failed to map vector_slave memory\n");
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return PTR_ERR(msi->vector_base);
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}
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msi->vector_phy = res->start;
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if (of_property_read_u32(np, "num-vectors", &msi->num_of_vectors)) {
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dev_err(&pdev->dev, "failed to parse the number of vectors\n");
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return -EINVAL;
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}
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ret = altera_allocate_domains(msi);
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if (ret)
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return ret;
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msi->irq = platform_get_irq(pdev, 0);
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if (msi->irq <= 0) {
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dev_err(&pdev->dev, "failed to map IRQ: %d\n", msi->irq);
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ret = -ENODEV;
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goto err;
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}
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irq_set_chained_handler_and_data(msi->irq, altera_msi_isr, msi);
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platform_set_drvdata(pdev, msi);
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return 0;
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err:
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altera_msi_remove(pdev);
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return ret;
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}
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static const struct of_device_id altera_msi_of_match[] = {
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{ .compatible = "altr,msi-1.0", NULL },
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{ },
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};
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static struct platform_driver altera_msi_driver = {
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.driver = {
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.name = "altera-msi",
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.of_match_table = altera_msi_of_match,
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},
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.probe = altera_msi_probe,
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.remove = altera_msi_remove,
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};
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static int __init altera_msi_init(void)
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{
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return platform_driver_register(&altera_msi_driver);
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}
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subsys_initcall(altera_msi_init);
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MODULE_AUTHOR("Ley Foon Tan <lftan@altera.com>");
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MODULE_DESCRIPTION("Altera PCIe MSI support");
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MODULE_LICENSE("GPL v2");
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