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drm/amd/pp: Refine code in powerplay for Cz/Vega10
Add dpm check functions on CZ/Vega10 to smu backend function table. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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d246cd53fd
commit
af264d0245
6 changed files with 43 additions and 39 deletions
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@ -1009,32 +1009,9 @@ static void cz_reset_acp_boot_level(struct pp_hwmgr *hwmgr)
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cz_hwmgr->acp_boot_level = 0xff;
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cz_hwmgr->acp_boot_level = 0xff;
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}
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}
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static bool cz_dpm_check_smu_features(struct pp_hwmgr *hwmgr,
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unsigned long check_feature)
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{
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int result;
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unsigned long features;
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result = smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_GetFeatureStatus, 0);
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if (result == 0) {
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features = smum_get_argument(hwmgr);
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if (features & check_feature)
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return true;
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}
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return false;
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}
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static bool cz_check_for_dpm_enabled(struct pp_hwmgr *hwmgr)
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{
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if (cz_dpm_check_smu_features(hwmgr, SMU_EnabledFeatureScoreboard_SclkDpmOn))
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return true;
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return false;
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}
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static int cz_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
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static int cz_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
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{
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{
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if (!cz_check_for_dpm_enabled(hwmgr)) {
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if (!smum_is_dpm_running(hwmgr)) {
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pr_info("dpm has been disabled\n");
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pr_info("dpm has been disabled\n");
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return 0;
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return 0;
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}
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}
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@ -1049,7 +1026,7 @@ static int cz_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
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static int cz_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
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static int cz_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
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{
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{
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if (cz_check_for_dpm_enabled(hwmgr)) {
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if (smum_is_dpm_running(hwmgr)) {
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pr_info("dpm has been enabled\n");
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pr_info("dpm has been enabled\n");
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return 0;
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return 0;
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}
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}
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@ -171,7 +171,6 @@ struct cz_power_state {
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#define DPMFlags_Debug 0x80000000
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#define DPMFlags_Debug 0x80000000
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#define SMU_EnabledFeatureScoreboard_AcpDpmOn 0x00000001 /* bit 0 */
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#define SMU_EnabledFeatureScoreboard_AcpDpmOn 0x00000001 /* bit 0 */
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#define SMU_EnabledFeatureScoreboard_SclkDpmOn 0x00200000
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#define SMU_EnabledFeatureScoreboard_UvdDpmOn 0x00800000 /* bit 23 */
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#define SMU_EnabledFeatureScoreboard_UvdDpmOn 0x00800000 /* bit 23 */
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#define SMU_EnabledFeatureScoreboard_VceDpmOn 0x01000000 /* bit 24 */
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#define SMU_EnabledFeatureScoreboard_VceDpmOn 0x01000000 /* bit 24 */
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@ -931,17 +931,6 @@ static int vega10_setup_asic_task(struct pp_hwmgr *hwmgr)
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return 0;
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return 0;
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}
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}
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static bool vega10_is_dpm_running(struct pp_hwmgr *hwmgr)
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{
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uint32_t features_enabled;
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if (!vega10_get_smc_features(hwmgr, &features_enabled)) {
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if (features_enabled & SMC_DPM_FEATURES)
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return true;
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}
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return false;
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}
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/**
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/**
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* Remove repeated voltage values and create table with unique values.
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* Remove repeated voltage values and create table with unique values.
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*
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*
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@ -2874,7 +2863,7 @@ static int vega10_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
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smum_send_msg_to_smc_with_parameter(hwmgr,
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smum_send_msg_to_smc_with_parameter(hwmgr,
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PPSMC_MSG_NumOfDisplays, 0);
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PPSMC_MSG_NumOfDisplays, 0);
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tmp_result = (!vega10_is_dpm_running(hwmgr)) ? 0 : -1;
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tmp_result = (!smum_is_dpm_running(hwmgr)) ? 0 : -1;
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PP_ASSERT_WITH_CODE(!tmp_result,
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PP_ASSERT_WITH_CODE(!tmp_result,
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"DPM is already running right , skipping re-enablement!",
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"DPM is already running right , skipping re-enablement!",
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return 0);
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return 0);
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@ -4699,7 +4688,7 @@ static int vega10_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
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{
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{
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int tmp_result, result = 0;
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int tmp_result, result = 0;
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tmp_result = (vega10_is_dpm_running(hwmgr)) ? 0 : -1;
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tmp_result = (smum_is_dpm_running(hwmgr)) ? 0 : -1;
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PP_ASSERT_WITH_CODE(tmp_result == 0,
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PP_ASSERT_WITH_CODE(tmp_result == 0,
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"DPM is not running right now, no need to disable DPM!",
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"DPM is not running right now, no need to disable DPM!",
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return 0);
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return 0);
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@ -855,6 +855,29 @@ static int cz_smu_fini(struct pp_hwmgr *hwmgr)
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return 0;
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return 0;
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}
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}
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static bool cz_dpm_check_smu_features(struct pp_hwmgr *hwmgr,
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unsigned long check_feature)
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{
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int result;
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unsigned long features;
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result = cz_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_GetFeatureStatus, 0);
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if (result == 0) {
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features = smum_get_argument(hwmgr);
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if (features & check_feature)
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return true;
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}
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return false;
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}
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static bool cz_is_dpm_running(struct pp_hwmgr *hwmgr)
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{
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if (cz_dpm_check_smu_features(hwmgr, SMU_EnabledFeatureScoreboard_SclkDpmOn))
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return true;
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return false;
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}
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const struct pp_smumgr_func cz_smu_funcs = {
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const struct pp_smumgr_func cz_smu_funcs = {
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.smu_init = cz_smu_init,
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.smu_init = cz_smu_init,
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.smu_fini = cz_smu_fini,
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.smu_fini = cz_smu_fini,
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@ -867,5 +890,6 @@ const struct pp_smumgr_func cz_smu_funcs = {
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.send_msg_to_smc_with_parameter = cz_send_msg_to_smc_with_parameter,
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.send_msg_to_smc_with_parameter = cz_send_msg_to_smc_with_parameter,
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.download_pptable_settings = cz_download_pptable_settings,
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.download_pptable_settings = cz_download_pptable_settings,
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.upload_pptable_settings = cz_upload_pptable_settings,
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.upload_pptable_settings = cz_upload_pptable_settings,
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.is_dpm_running = cz_is_dpm_running,
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};
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};
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@ -31,6 +31,8 @@
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#define CZ_SCRATCH_SIZE_SDMA_METADATA 1024
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#define CZ_SCRATCH_SIZE_SDMA_METADATA 1024
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#define CZ_SCRATCH_SIZE_IH ((2*256+1)*4)
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#define CZ_SCRATCH_SIZE_IH ((2*256+1)*4)
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#define SMU_EnabledFeatureScoreboard_SclkDpmOn 0x00200000
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enum cz_scratch_entry {
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enum cz_scratch_entry {
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CZ_SCRATCH_ENTRY_UCODE_ID_SDMA0 = 0,
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CZ_SCRATCH_ENTRY_UCODE_ID_SDMA0 = 0,
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CZ_SCRATCH_ENTRY_UCODE_ID_SDMA1,
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CZ_SCRATCH_ENTRY_UCODE_ID_SDMA1,
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@ -317,6 +317,18 @@ int vega10_get_smc_features(struct pp_hwmgr *hwmgr,
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return 0;
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return 0;
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}
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}
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static bool vega10_is_dpm_running(struct pp_hwmgr *hwmgr)
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{
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uint32_t features_enabled = 0;
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vega10_get_smc_features(hwmgr, &features_enabled);
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if (features_enabled & SMC_DPM_FEATURES)
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return true;
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else
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return false;
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}
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int vega10_set_tools_address(struct pp_hwmgr *hwmgr)
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int vega10_set_tools_address(struct pp_hwmgr *hwmgr)
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{
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{
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struct vega10_smumgr *priv =
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struct vega10_smumgr *priv =
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@ -583,4 +595,5 @@ const struct pp_smumgr_func vega10_smu_funcs = {
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.send_msg_to_smc_with_parameter = &vega10_send_msg_to_smc_with_parameter,
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.send_msg_to_smc_with_parameter = &vega10_send_msg_to_smc_with_parameter,
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.download_pptable_settings = NULL,
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.download_pptable_settings = NULL,
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.upload_pptable_settings = NULL,
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.upload_pptable_settings = NULL,
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.is_dpm_running = vega10_is_dpm_running,
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};
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};
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