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net/mlx4_en: Add DCB PFC support through CEE netlink commands
This patch adds support for reading and updating priority flow control (PFC) attributes in the driver via netlink. Signed-off-by: Rana Shahout <ranas@mellanox.com> Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com> Signed-off-by: Eugenia Emantayev <eugenia@mellanox.com> Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
51dca8a1cf
commit
af7d518526
8 changed files with 331 additions and 14 deletions
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@ -37,6 +37,11 @@
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#include "mlx4_en.h"
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#include "fw_qos.h"
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enum {
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MLX4_CEE_STATE_DOWN = 0,
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MLX4_CEE_STATE_UP = 1,
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};
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/* Definitions for QCN
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*/
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@ -80,13 +85,202 @@ struct mlx4_congestion_control_mb_prio_802_1_qau_statistics {
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__be32 reserved3[4];
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};
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static u8 mlx4_en_dcbnl_getcap(struct net_device *dev, int capid, u8 *cap)
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{
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struct mlx4_en_priv *priv = netdev_priv(dev);
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switch (capid) {
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case DCB_CAP_ATTR_PFC:
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*cap = true;
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break;
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case DCB_CAP_ATTR_DCBX:
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*cap = priv->cee_params.dcbx_cap;
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break;
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case DCB_CAP_ATTR_PFC_TCS:
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*cap = 1 << mlx4_max_tc(priv->mdev->dev);
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break;
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default:
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*cap = false;
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break;
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}
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return 0;
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}
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static u8 mlx4_en_dcbnl_getpfcstate(struct net_device *netdev)
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{
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struct mlx4_en_priv *priv = netdev_priv(netdev);
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return priv->cee_params.dcb_cfg.pfc_state;
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}
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static void mlx4_en_dcbnl_setpfcstate(struct net_device *netdev, u8 state)
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{
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struct mlx4_en_priv *priv = netdev_priv(netdev);
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priv->cee_params.dcb_cfg.pfc_state = state;
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}
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static void mlx4_en_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority,
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u8 *setting)
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{
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struct mlx4_en_priv *priv = netdev_priv(netdev);
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*setting = priv->cee_params.dcb_cfg.tc_config[priority].dcb_pfc;
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}
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static void mlx4_en_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority,
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u8 setting)
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{
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struct mlx4_en_priv *priv = netdev_priv(netdev);
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priv->cee_params.dcb_cfg.tc_config[priority].dcb_pfc = setting;
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priv->cee_params.dcb_cfg.pfc_state = true;
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}
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static int mlx4_en_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num)
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{
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struct mlx4_en_priv *priv = netdev_priv(netdev);
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if (!(priv->flags & MLX4_EN_FLAG_DCB_ENABLED))
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return -EINVAL;
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if (tcid == DCB_NUMTCS_ATTR_PFC)
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*num = mlx4_max_tc(priv->mdev->dev);
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else
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*num = 0;
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return 0;
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}
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static u8 mlx4_en_dcbnl_set_all(struct net_device *netdev)
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{
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struct mlx4_en_priv *priv = netdev_priv(netdev);
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struct mlx4_en_dev *mdev = priv->mdev;
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struct mlx4_en_cee_config *dcb_cfg = &priv->cee_params.dcb_cfg;
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int err = 0;
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if (!(priv->cee_params.dcbx_cap & DCB_CAP_DCBX_VER_CEE))
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return -EINVAL;
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if (dcb_cfg->pfc_state) {
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int tc;
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priv->prof->rx_pause = 0;
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priv->prof->tx_pause = 0;
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for (tc = 0; tc < CEE_DCBX_MAX_PRIO; tc++) {
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u8 tc_mask = 1 << tc;
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switch (dcb_cfg->tc_config[tc].dcb_pfc) {
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case pfc_disabled:
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priv->prof->tx_ppp &= ~tc_mask;
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priv->prof->rx_ppp &= ~tc_mask;
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break;
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case pfc_enabled_full:
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priv->prof->tx_ppp |= tc_mask;
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priv->prof->rx_ppp |= tc_mask;
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break;
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case pfc_enabled_tx:
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priv->prof->tx_ppp |= tc_mask;
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priv->prof->rx_ppp &= ~tc_mask;
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break;
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case pfc_enabled_rx:
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priv->prof->tx_ppp &= ~tc_mask;
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priv->prof->rx_ppp |= tc_mask;
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break;
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default:
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break;
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}
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}
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en_dbg(DRV, priv, "Set pfc on\n");
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} else {
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priv->prof->rx_pause = 1;
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priv->prof->tx_pause = 1;
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en_dbg(DRV, priv, "Set pfc off\n");
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}
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err = mlx4_SET_PORT_general(mdev->dev, priv->port,
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priv->rx_skb_size + ETH_FCS_LEN,
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priv->prof->tx_pause,
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priv->prof->tx_ppp,
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priv->prof->rx_pause,
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priv->prof->rx_ppp);
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if (err)
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en_err(priv, "Failed setting pause params\n");
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return err;
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}
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static u8 mlx4_en_dcbnl_get_state(struct net_device *dev)
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{
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struct mlx4_en_priv *priv = netdev_priv(dev);
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if (priv->flags & MLX4_EN_FLAG_DCB_ENABLED)
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return MLX4_CEE_STATE_UP;
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return MLX4_CEE_STATE_DOWN;
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}
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static u8 mlx4_en_dcbnl_set_state(struct net_device *dev, u8 state)
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{
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struct mlx4_en_priv *priv = netdev_priv(dev);
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int num_tcs = 0;
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if (!(priv->cee_params.dcbx_cap & DCB_CAP_DCBX_VER_CEE))
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return 1;
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if (!!(state) == !!(priv->flags & MLX4_EN_FLAG_DCB_ENABLED))
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return 0;
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if (state) {
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priv->flags |= MLX4_EN_FLAG_DCB_ENABLED;
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num_tcs = IEEE_8021QAZ_MAX_TCS;
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} else {
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priv->flags &= ~MLX4_EN_FLAG_DCB_ENABLED;
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}
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return mlx4_en_setup_tc(dev, num_tcs);
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}
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/* On success returns a non-zero 802.1p user priority bitmap
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* otherwise returns 0 as the invalid user priority bitmap to
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* indicate an error.
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*/
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static int mlx4_en_dcbnl_getapp(struct net_device *netdev, u8 idtype, u16 id)
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{
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struct mlx4_en_priv *priv = netdev_priv(netdev);
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struct dcb_app app = {
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.selector = idtype,
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.protocol = id,
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};
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if (!(priv->cee_params.dcbx_cap & DCB_CAP_DCBX_VER_CEE))
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return 0;
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return dcb_getapp(netdev, &app);
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}
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static int mlx4_en_dcbnl_setapp(struct net_device *netdev, u8 idtype,
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u16 id, u8 up)
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{
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struct mlx4_en_priv *priv = netdev_priv(netdev);
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struct dcb_app app;
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if (!(priv->cee_params.dcbx_cap & DCB_CAP_DCBX_VER_CEE))
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return -EINVAL;
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memset(&app, 0, sizeof(struct dcb_app));
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app.selector = idtype;
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app.protocol = id;
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app.priority = up;
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return dcb_setapp(netdev, &app);
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}
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static int mlx4_en_dcbnl_ieee_getets(struct net_device *dev,
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struct ieee_ets *ets)
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{
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struct mlx4_en_priv *priv = netdev_priv(dev);
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struct ieee_ets *my_ets = &priv->ets;
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/* No IEEE PFC settings available */
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if (!my_ets)
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return -EINVAL;
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@ -237,18 +431,51 @@ static int mlx4_en_dcbnl_ieee_setpfc(struct net_device *dev,
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static u8 mlx4_en_dcbnl_getdcbx(struct net_device *dev)
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{
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return DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_IEEE;
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struct mlx4_en_priv *priv = netdev_priv(dev);
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return priv->cee_params.dcbx_cap;
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}
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static u8 mlx4_en_dcbnl_setdcbx(struct net_device *dev, u8 mode)
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{
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struct mlx4_en_priv *priv = netdev_priv(dev);
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struct ieee_ets ets = {0};
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struct ieee_pfc pfc = {0};
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if (mode == priv->cee_params.dcbx_cap)
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return 0;
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if ((mode & DCB_CAP_DCBX_LLD_MANAGED) ||
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(mode & DCB_CAP_DCBX_VER_CEE) ||
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!(mode & DCB_CAP_DCBX_VER_IEEE) ||
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((mode & DCB_CAP_DCBX_VER_IEEE) &&
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(mode & DCB_CAP_DCBX_VER_CEE)) ||
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!(mode & DCB_CAP_DCBX_HOST))
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return 1;
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goto err;
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priv->cee_params.dcbx_cap = mode;
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ets.ets_cap = IEEE_8021QAZ_MAX_TCS;
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pfc.pfc_cap = IEEE_8021QAZ_MAX_TCS;
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if (mode & DCB_CAP_DCBX_VER_IEEE) {
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if (mlx4_en_dcbnl_ieee_setets(dev, &ets))
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goto err;
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if (mlx4_en_dcbnl_ieee_setpfc(dev, &pfc))
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goto err;
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} else if (mode & DCB_CAP_DCBX_VER_CEE) {
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if (mlx4_en_dcbnl_set_all(dev))
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goto err;
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} else {
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if (mlx4_en_dcbnl_ieee_setets(dev, &ets))
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goto err;
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if (mlx4_en_dcbnl_ieee_setpfc(dev, &pfc))
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goto err;
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if (mlx4_en_setup_tc(dev, 0))
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goto err;
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}
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return 0;
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err:
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return 1;
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}
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#define MLX4_RATELIMIT_UNITS_IN_KB 100000 /* rate-limit HW unit in Kbps */
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@ -463,24 +690,46 @@ static int mlx4_en_dcbnl_ieee_getqcnstats(struct net_device *dev,
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}
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const struct dcbnl_rtnl_ops mlx4_en_dcbnl_ops = {
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.ieee_getets = mlx4_en_dcbnl_ieee_getets,
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.ieee_setets = mlx4_en_dcbnl_ieee_setets,
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.ieee_getmaxrate = mlx4_en_dcbnl_ieee_getmaxrate,
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.ieee_setmaxrate = mlx4_en_dcbnl_ieee_setmaxrate,
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.ieee_getpfc = mlx4_en_dcbnl_ieee_getpfc,
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.ieee_setpfc = mlx4_en_dcbnl_ieee_setpfc,
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.ieee_getets = mlx4_en_dcbnl_ieee_getets,
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.ieee_setets = mlx4_en_dcbnl_ieee_setets,
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.ieee_getmaxrate = mlx4_en_dcbnl_ieee_getmaxrate,
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.ieee_setmaxrate = mlx4_en_dcbnl_ieee_setmaxrate,
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.ieee_getqcn = mlx4_en_dcbnl_ieee_getqcn,
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.ieee_setqcn = mlx4_en_dcbnl_ieee_setqcn,
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.ieee_getqcnstats = mlx4_en_dcbnl_ieee_getqcnstats,
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.ieee_getpfc = mlx4_en_dcbnl_ieee_getpfc,
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.ieee_setpfc = mlx4_en_dcbnl_ieee_setpfc,
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.getstate = mlx4_en_dcbnl_get_state,
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.setstate = mlx4_en_dcbnl_set_state,
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.getpfccfg = mlx4_en_dcbnl_get_pfc_cfg,
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.setpfccfg = mlx4_en_dcbnl_set_pfc_cfg,
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.setall = mlx4_en_dcbnl_set_all,
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.getcap = mlx4_en_dcbnl_getcap,
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.getnumtcs = mlx4_en_dcbnl_getnumtcs,
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.getpfcstate = mlx4_en_dcbnl_getpfcstate,
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.setpfcstate = mlx4_en_dcbnl_setpfcstate,
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.getapp = mlx4_en_dcbnl_getapp,
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.setapp = mlx4_en_dcbnl_setapp,
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.getdcbx = mlx4_en_dcbnl_getdcbx,
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.setdcbx = mlx4_en_dcbnl_setdcbx,
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.ieee_getqcn = mlx4_en_dcbnl_ieee_getqcn,
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.ieee_setqcn = mlx4_en_dcbnl_ieee_setqcn,
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.ieee_getqcnstats = mlx4_en_dcbnl_ieee_getqcnstats,
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};
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const struct dcbnl_rtnl_ops mlx4_en_dcbnl_pfc_ops = {
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.ieee_getpfc = mlx4_en_dcbnl_ieee_getpfc,
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.ieee_setpfc = mlx4_en_dcbnl_ieee_setpfc,
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.setstate = mlx4_en_dcbnl_set_state,
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.getpfccfg = mlx4_en_dcbnl_get_pfc_cfg,
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.setpfccfg = mlx4_en_dcbnl_set_pfc_cfg,
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.setall = mlx4_en_dcbnl_set_all,
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.getnumtcs = mlx4_en_dcbnl_getnumtcs,
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.getpfcstate = mlx4_en_dcbnl_getpfcstate,
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.setpfcstate = mlx4_en_dcbnl_setpfcstate,
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.getapp = mlx4_en_dcbnl_getapp,
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.setapp = mlx4_en_dcbnl_setapp,
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.getdcbx = mlx4_en_dcbnl_getdcbx,
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.setdcbx = mlx4_en_dcbnl_setdcbx,
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};
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@ -67,6 +67,17 @@ int mlx4_en_setup_tc(struct net_device *dev, u8 up)
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offset += priv->num_tx_rings_p_up;
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}
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#ifdef CONFIG_MLX4_EN_DCB
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if (!mlx4_is_slave(priv->mdev->dev)) {
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if (up) {
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priv->flags |= MLX4_EN_FLAG_DCB_ENABLED;
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} else {
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priv->flags &= ~MLX4_EN_FLAG_DCB_ENABLED;
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priv->cee_params.dcb_cfg.pfc_state = false;
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}
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}
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#endif /* CONFIG_MLX4_EN_DCB */
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return 0;
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}
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@ -2815,6 +2826,9 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
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struct mlx4_en_priv *priv;
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int i;
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int err;
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#ifdef CONFIG_MLX4_EN_DCB
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struct tc_configuration *tc;
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#endif
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dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
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MAX_TX_RINGS, MAX_RX_RINGS);
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@ -2881,6 +2895,17 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
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priv->msg_enable = MLX4_EN_MSG_LEVEL;
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#ifdef CONFIG_MLX4_EN_DCB
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if (!mlx4_is_slave(priv->mdev->dev)) {
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priv->cee_params.dcbx_cap = DCB_CAP_DCBX_VER_CEE |
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DCB_CAP_DCBX_HOST |
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DCB_CAP_DCBX_VER_IEEE;
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priv->flags |= MLX4_EN_DCB_ENABLED;
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priv->cee_params.dcb_cfg.pfc_state = false;
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for (i = 0; i < MLX4_EN_NUM_UP; i++) {
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tc = &priv->cee_params.dcb_cfg.tc_config[i];
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tc->dcb_pfc = pfc_disabled;
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}
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if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) {
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dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
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} else {
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@ -1128,6 +1128,7 @@ int mlx4_QUERY_PORT(struct mlx4_dev *dev, int port, struct mlx4_port_cap *port_c
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port_cap->max_pkeys = 1 << (field & 0xf);
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MLX4_GET(field, outbox, QUERY_PORT_MAX_VL_OFFSET);
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port_cap->max_vl = field & 0xf;
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port_cap->max_tc_eth = field >> 4;
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MLX4_GET(field, outbox, QUERY_PORT_MAX_MACVLAN_OFFSET);
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port_cap->log_max_macs = field & 0xf;
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port_cap->log_max_vlans = field >> 4;
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@ -53,6 +53,7 @@ struct mlx4_port_cap {
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int ib_mtu;
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int max_port_width;
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int max_vl;
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int max_tc_eth;
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int max_gids;
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int max_pkeys;
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u64 def_mac;
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@ -292,6 +292,7 @@ static int _mlx4_dev_port(struct mlx4_dev *dev, int port,
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dev->caps.pkey_table_len[port] = port_cap->max_pkeys;
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dev->caps.port_width_cap[port] = port_cap->max_port_width;
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dev->caps.eth_mtu_cap[port] = port_cap->eth_mtu;
|
||||
dev->caps.max_tc_eth = port_cap->max_tc_eth;
|
||||
dev->caps.def_mac[port] = port_cap->def_mac;
|
||||
dev->caps.supported_type[port] = port_cap->supported_port_types;
|
||||
dev->caps.suggested_type[port] = port_cap->suggested_type;
|
||||
|
|
|
@ -448,6 +448,27 @@ struct mlx4_en_frag_info {
|
|||
|
||||
#define MLX4_EN_TC_ETS 7
|
||||
|
||||
enum dcb_pfc_type {
|
||||
pfc_disabled = 0,
|
||||
pfc_enabled_full,
|
||||
pfc_enabled_tx,
|
||||
pfc_enabled_rx
|
||||
};
|
||||
|
||||
struct tc_configuration {
|
||||
enum dcb_pfc_type dcb_pfc;
|
||||
};
|
||||
|
||||
struct mlx4_en_cee_config {
|
||||
bool pfc_state;
|
||||
struct tc_configuration tc_config[MLX4_EN_NUM_UP];
|
||||
};
|
||||
|
||||
struct mlx4_en_cee_params {
|
||||
u8 dcbx_cap;
|
||||
struct mlx4_en_cee_config dcb_cfg;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
struct ethtool_flow_id {
|
||||
|
@ -467,6 +488,9 @@ enum {
|
|||
MLX4_EN_FLAG_RX_FILTER_NEEDED = (1 << 3),
|
||||
MLX4_EN_FLAG_FORCE_PROMISC = (1 << 4),
|
||||
MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP = (1 << 5),
|
||||
#ifdef CONFIG_MLX4_EN_DCB
|
||||
MLX4_EN_FLAG_DCB_ENABLED = (1 << 6),
|
||||
#endif
|
||||
};
|
||||
|
||||
#define PORT_BEACON_MAX_LIMIT (65535)
|
||||
|
@ -568,9 +592,11 @@ struct mlx4_en_priv {
|
|||
u32 counter_index;
|
||||
|
||||
#ifdef CONFIG_MLX4_EN_DCB
|
||||
#define MLX4_EN_DCB_ENABLED 0x3
|
||||
struct ieee_ets ets;
|
||||
u16 maxrate[IEEE_8021QAZ_MAX_TCS];
|
||||
enum dcbnl_cndd_states cndd_state[IEEE_8021QAZ_MAX_TCS];
|
||||
struct mlx4_en_cee_params cee_params;
|
||||
#endif
|
||||
#ifdef CONFIG_RFS_ACCEL
|
||||
spinlock_t filters_lock;
|
||||
|
|
|
@ -52,6 +52,7 @@
|
|||
|
||||
#define MLX4_FLAG_V_IGNORE_FCS_MASK 0x2
|
||||
#define MLX4_IGNORE_FCS_MASK 0x1
|
||||
#define MLNX4_TX_MAX_NUMBER 8
|
||||
|
||||
void mlx4_init_mac_table(struct mlx4_dev *dev, struct mlx4_mac_table *table)
|
||||
{
|
||||
|
@ -2015,3 +2016,14 @@ int mlx4_get_module_info(struct mlx4_dev *dev, u8 port,
|
|||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL(mlx4_get_module_info);
|
||||
|
||||
int mlx4_max_tc(struct mlx4_dev *dev)
|
||||
{
|
||||
u8 num_tc = dev->caps.max_tc_eth;
|
||||
|
||||
if (!num_tc)
|
||||
num_tc = MLNX4_TX_MAX_NUMBER;
|
||||
|
||||
return num_tc;
|
||||
}
|
||||
EXPORT_SYMBOL(mlx4_max_tc);
|
||||
|
|
|
@ -535,6 +535,7 @@ struct mlx4_caps {
|
|||
int max_rq_desc_sz;
|
||||
int max_qp_init_rdma;
|
||||
int max_qp_dest_rdma;
|
||||
int max_tc_eth;
|
||||
u32 *qp0_qkey;
|
||||
u32 *qp0_proxy;
|
||||
u32 *qp1_proxy;
|
||||
|
@ -1494,6 +1495,7 @@ int mlx4_mr_rereg_mem_write(struct mlx4_dev *dev, struct mlx4_mr *mr,
|
|||
|
||||
int mlx4_get_module_info(struct mlx4_dev *dev, u8 port,
|
||||
u16 offset, u16 size, u8 *data);
|
||||
int mlx4_max_tc(struct mlx4_dev *dev);
|
||||
|
||||
/* Returns true if running in low memory profile (kdump kernel) */
|
||||
static inline bool mlx4_low_memory_profile(void)
|
||||
|
|
Loading…
Reference in a new issue