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ALSA: dice: enable to change current sampling transmission frequency
This is a preparation for userspace applications to change current sampling transmission frequency via ALSA PCM interface. Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
parent
20b9454479
commit
afa617f219
1 changed files with 43 additions and 4 deletions
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@ -62,9 +62,11 @@ int snd_dice_stream_get_rate_mode(struct snd_dice *dice, unsigned int rate,
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* This operation has an effect to synchronize GLOBAL_STATUS/GLOBAL_SAMPLE_RATE
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* to GLOBAL_STATUS. Especially, just after powering on, these are different.
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*/
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static int ensure_phase_lock(struct snd_dice *dice)
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static int ensure_phase_lock(struct snd_dice *dice, unsigned int rate)
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{
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__be32 reg, nominal;
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u32 data;
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int i;
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int err;
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err = snd_dice_transaction_read_global(dice, GLOBAL_CLOCK_SELECT,
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@ -72,9 +74,21 @@ static int ensure_phase_lock(struct snd_dice *dice)
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if (err < 0)
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return err;
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data = be32_to_cpu(reg);
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data &= ~CLOCK_RATE_MASK;
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for (i = 0; i < ARRAY_SIZE(snd_dice_rates); ++i) {
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if (snd_dice_rates[i] == rate)
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break;
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}
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if (i == ARRAY_SIZE(snd_dice_rates))
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return -EINVAL;
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data |= i << CLOCK_RATE_SHIFT;
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if (completion_done(&dice->clock_accepted))
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reinit_completion(&dice->clock_accepted);
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reg = cpu_to_be32(data);
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err = snd_dice_transaction_write_global(dice, GLOBAL_CLOCK_SELECT,
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®, sizeof(reg));
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if (err < 0)
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@ -220,6 +234,7 @@ static int start_streams(struct snd_dice *dice, enum amdtp_stream_direction dir,
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unsigned int rate, struct reg_params *params)
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{
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__be32 reg[2];
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enum snd_dice_rate_mode mode;
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unsigned int i, pcm_chs, midi_ports;
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struct amdtp_stream *streams;
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struct fw_iso_resources *resources;
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@ -234,12 +249,23 @@ static int start_streams(struct snd_dice *dice, enum amdtp_stream_direction dir,
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resources = dice->rx_resources;
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}
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err = snd_dice_stream_get_rate_mode(dice, rate, &mode);
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if (err < 0)
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return err;
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for (i = 0; i < params->count; i++) {
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unsigned int pcm_cache;
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unsigned int midi_cache;
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if (dir == AMDTP_IN_STREAM) {
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pcm_cache = dice->tx_pcm_chs[i][mode];
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midi_cache = dice->tx_midi_ports[i];
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err = snd_dice_transaction_read_tx(dice,
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params->size * i + TX_NUMBER_AUDIO,
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reg, sizeof(reg));
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} else {
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pcm_cache = dice->rx_pcm_chs[i][mode];
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midi_cache = dice->rx_midi_ports[i];
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err = snd_dice_transaction_read_rx(dice,
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params->size * i + RX_NUMBER_AUDIO,
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reg, sizeof(reg));
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@ -249,6 +275,14 @@ static int start_streams(struct snd_dice *dice, enum amdtp_stream_direction dir,
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pcm_chs = be32_to_cpu(reg[0]);
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midi_ports = be32_to_cpu(reg[1]);
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/* These are important for developer of this driver. */
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if (pcm_chs != pcm_cache || midi_ports != midi_cache) {
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dev_info(&dice->unit->device,
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"cache mismatch: pcm: %u:%u, midi: %u:%u\n",
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pcm_chs, pcm_cache, midi_ports, midi_cache);
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return -EPROTO;
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}
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err = keep_resources(dice, dir, i, rate, pcm_chs, midi_ports);
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if (err < 0)
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return err;
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@ -300,12 +334,17 @@ static int start_duplex_streams(struct snd_dice *dice, unsigned int rate)
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snd_dice_transaction_clear_enable(dice);
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release_resources(dice);
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err = ensure_phase_lock(dice);
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err = ensure_phase_lock(dice, rate);
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if (err < 0) {
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dev_err(&dice->unit->device, "fail to ensure phase lock\n");
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return err;
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}
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/* Likely to have changed stream formats. */
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err = get_register_params(dice, &tx_params, &rx_params);
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if (err < 0)
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return err;
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/* Start both streams. */
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err = start_streams(dice, AMDTP_IN_STREAM, rate, &tx_params);
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if (err < 0)
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@ -366,7 +405,7 @@ int snd_dice_stream_start_duplex(struct snd_dice *dice, unsigned int rate)
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if (rate == 0)
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rate = curr_rate;
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if (rate != curr_rate)
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return -EINVAL;
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goto restart;
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/* Check error of packet streaming. */
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for (i = 0; i < MAX_STREAMS; ++i) {
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@ -560,7 +599,7 @@ int snd_dice_stream_detect_current_formats(struct snd_dice *dice)
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* invalid stream formats. Selecting clock parameters have an effect
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* for the unit to refine it.
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*/
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err = ensure_phase_lock(dice);
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err = ensure_phase_lock(dice, rate);
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if (err < 0)
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return err;
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