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serial: 8250: Define IIR 64 byte bit & cleanup related code
16750 indicates 64 bytes FIFO with a IIR bit. Add define for it and make related code more obvious. Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20221125130509.8482-6-ilpo.jarvinen@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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2 changed files with 10 additions and 5 deletions
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@ -1050,11 +1050,12 @@ static void autoconfig_16550a(struct uart_8250_port *up)
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serial_out(up, UART_LCR, 0);
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serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
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UART_FCR7_64BYTE);
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status1 = serial_in(up, UART_IIR) >> 5;
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status1 = serial_in(up, UART_IIR) & (UART_IIR_64BYTE_FIFO |
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UART_IIR_FIFO_ENABLED);
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serial_out(up, UART_FCR, 0);
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serial_out(up, UART_LCR, 0);
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if (status1 == 7)
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if (status1 == (UART_IIR_64BYTE_FIFO | UART_IIR_FIFO_ENABLED))
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up->port.type = PORT_16550A_FSL64;
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else
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DEBUG_AUTOCONF("Motorola 8xxx DUART ");
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@ -1122,17 +1123,20 @@ static void autoconfig_16550a(struct uart_8250_port *up)
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*/
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serial_out(up, UART_LCR, 0);
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serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
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status1 = serial_in(up, UART_IIR) >> 5;
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status1 = serial_in(up, UART_IIR) & (UART_IIR_64BYTE_FIFO | UART_IIR_FIFO_ENABLED);
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serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
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serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
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serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
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status2 = serial_in(up, UART_IIR) >> 5;
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status2 = serial_in(up, UART_IIR) & (UART_IIR_64BYTE_FIFO | UART_IIR_FIFO_ENABLED);
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serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
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serial_out(up, UART_LCR, 0);
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DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
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if (status1 == 6 && status2 == 7) {
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if (status1 == UART_IIR_FIFO_ENABLED_16550A &&
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status2 == (UART_IIR_64BYTE_FIFO | UART_IIR_FIFO_ENABLED_16550A)) {
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up->port.type = PORT_16750;
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up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
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return;
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@ -44,6 +44,7 @@
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#define UART_IIR_RX_TIMEOUT 0x0c /* OMAP RX Timeout interrupt */
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#define UART_IIR_XOFF 0x10 /* OMAP XOFF/Special Character */
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#define UART_IIR_CTS_RTS_DSR 0x20 /* OMAP CTS/RTS/DSR Change */
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#define UART_IIR_64BYTE_FIFO 0x20 /* 16750 64 bytes FIFO */
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#define UART_IIR_FIFO_ENABLED 0xc0 /* FIFOs enabled / port type identification */
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#define UART_IIR_FIFO_ENABLED_8250 0x00 /* 8250: no FIFO */
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#define UART_IIR_FIFO_ENABLED_16550 0x80 /* 16550: (broken/unusable) FIFO */
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